# US 2014/0191310 A1 · Power semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0191310 A1 - Document ID: US20140191310A1 - Status: Published application - Kind: A1 - Application number: 14/202,912 - Filed: 2014-03-10 - Published: 2014-07-10 - Earliest claimed: 2012-03-23 - Assignees: Kabushiki Kaisha Toshiba - Applicants: Kabushiki Kaisha Toshiba - Inventors: Syotaro ONO; Masaru IZUMISAWA; Hiroshi OHTA; Hiroaki YAMASHITA - Web page: https://patentgrep.com/patent/US20140191310A1 ## CPC - H10D 64/117: {Recessed field plates, e.g. trench field plates or buried field plates} - H10D 12/441: {Vertical IGBTs} - H10D 30/0291: {of vertical DMOS [VDMOS] FETs} - H10D 30/665: {having edge termination structures} - H10D 62/058: {by using trenches, e.g. implanting into sidewalls of trenches or refilling trenches} - H10D 62/111: {Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures} - H10D 64/112: {comprising multiple field plate segments} - H10D 62/112: {for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers} - H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs} - H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)} - H10D 64/111: {Field plates} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A power semiconductor device according to an embodiment includes an element portion in which MOSFET elements are provided and a termination portion provided around the element portion, and has pillar layers provided respectively in parallel to each other in a semiconductor substrate. The device includes a first trench and a first insulation film. The first trench is provided between end portions of the pillar layers, in the semiconductor substrate at the termination portion exposed from a source electrode of the MOSFET elements. The first insulation film is provided on a side surface and a bottom surface of the first trench. ## Claims ### Claim 1 A power semiconductor device including an element portion, and a termination portion provided around the element portion, the power semiconductor device comprising: a first-conductivity type semiconductor substrate; a second-conductivity type first impurity layer provided at a part of the element portion on an upper surface of the semiconductor substrate; a first-conductivity type second impurity layer provided at a part of an upper end of the first impurity layer; a gate electrode provided to become in contact with the first impurity layer via a gate insulation film; a first electrode provided on a lower surface of the semiconductor substrate; a second electrode provided to become in contact with the first impurity layer, on the upper surface of the semiconductor substrate; a plurality of second-conductivity type pillar layers provided at least in the semiconductor substrate of the element portion; and a first insulation film provided in the semiconductor substrate of the termination portion, the first insulation film being provided between the pillar layers adjacent to each other. ### Claim 2 (depends on 1) The power semiconductor device according to claim 1, further comprising: a third impurity layer of the first conductivity type in a higher concentration than that of the semiconductor substrate, provided on an upper surface of the semiconductor substrate so as to surround the plurality of pillar layers; an EQPR electrode that is provided on an upper surface of the semiconductor substrate so as to be connected to the third impurity layer; and a first floating electrode provided in the first insulation film, the first floating electrode being electrically connected to the EQPR electrode. ### Claim 3 (depends on 2) The power semiconductor device according to claim 2, wherein the EQPR electrode and the first floating electrode are made of polysilicon, respectively. ### Claim 4 (depends on 3) The power semiconductor device according to claim 3, wherein the EQPR electrode is made of polysilicon formed in approximately a square ring shape, and the first floating electrode is made of polysilicon provided so as to be in contact with one of opposite two sides of the ring-shaped EQPR electrode made of polysilicon. ### Claim 5 (depends on 2) The power semiconductor device according to claim 2, further having a field plate electrode provided between the second electrode and the EQPR electrode and connected to the gate electrode, above the upper surface of the semiconductor substrate. ### Claim 6 (depends on 5) The power semiconductor device according to claim 5, wherein the EQPR electrode and the field plate electrode are provided on a field oxide film provided on the upper surface of the semiconductor substrate. ### Claim 7 (depends on 1) The power semiconductor device according to claim 1, further comprising: a second insulation film provided in the semiconductor substrate of the termination portion, the second insulation film being provided along the pillar layer. ### Claim 8 (depends on 7) The power semiconductor device according to claim 7, wherein the second insulation film is provided in the semiconductor substrate outside of the outermost pillar layer. ### Claim 9 (depends on 8) The power semiconductor device according to claim 8, further comprising: a third impurity layer of the first conductivity type in a higher concentration than that of the semiconductor substrate, provided on an upper surface of the semiconductor substrate so as to surround the plurality of pillar layers; an EQPR electrode provided to be connected to the third impurity layer; a first floating electrode provided in the first insulation film, the first floating electrode being electrically connected to the EQPR electrode; and a second floating electrode provided in the second insulation film, the second floating electrode being electrically connected to the EQPR electrode. ### Claim 10 (depends on 9) The power semiconductor device according to claim 9, wherein the EQPR electrode, the first floating electrode, and the second floating electrode are made of polysilicon, respectively. ### Claim 11 (depends on 10) The power semiconductor device according to claim 10, wherein the EQPR electrode is a polysilicon formed in approximately a square ring shape, the first floating electrode is made of polysilicon provided so as to be in contact with one of opposite two sides of the ring-shaped EQPR electrode made of polysilicon, and the second floating electrode is made of polysilicon provided to be in contact with both two sides of the ring-shaped EQPR electrode made of polysilicon. ### Claim 12 (depends on 9) The power semiconductor device according to claim 9, further having a field plate electrode provided between the second electrode and the EQPR electrode and connected to the gate electrode, above the upper surface of the semiconductor substrate. ### Claim 13 (depends on 12) The power semiconductor device according to claim 12, wherein the EQPR electrode and the field plate electrode are provided on a field oxide film provided on the upper surface of the semiconductor substrate. ### Claim 14 (depends on 7) The power semiconductor device according to claim 7, wherein the second insulation films are provided in the semiconductor substrate outside of the outermost pillar layer, and in the semiconductor substrate between the outermost pillar layer and other pillar layer adjacent to the outermost pillar layer. ### Claim 15 (depends on 14) The power semiconductor device according to claim 14, further comprising: a third impurity layer of the first conductivity type in a higher concentration than that of the semiconductor substrate, provided on an upper surface of the semiconductor substrate so as to surround the plurality of pillar layers; an EQPR electrode provided to be connected onto the third impurity layer; a first floating electrode provided in the first insulation film, the first floating electrode being electrically connected to the EQPR electrode; and second floating electrodes provided in the second insulation films, the second floating electrodes being electrically connected to the EQPR electrode. ### Claim 16 (depends on 15) The power semiconductor device according to claim 15, wherein the EQPR electrode, the first floating electrode, and the plurality of second floating electrodes are made of polysilicon. ### Claim 17 (depends on 16) The power semiconductor device according to claim 16, wherein the EQPR electrode is a polysilicon formed in approximately a square ring shape, the first floating electrode is made of polysilicon provided so as to be in contact with one of opposite two sides of the ring-shaped EQPR electrode made of polysilicon, and the second floating electrodes are made of polysilicon provided to be in contact with both two sides of the ring-shaped EQPR electrode made of polysilicon. ### Claim 18 (depends on 15) The power semiconductor device according to claim 15, further having a field plate electrode provided between the second electrode and the EQPR electrode and connected to the gate electrode, above the upper surface of the semiconductor substrate. ### Claim 19 (depends on 18) The power semiconductor device according to claim 18, wherein the EQPR electrode and the field plate electrode are provided on a field oxide film provided on the upper surface of the semiconductor substrate. ### Claim 20 (depends on 1) The power semiconductor device according to claim 1, wherein the power semiconductor element is a MOSFET element that has the first impurity layer as a base layer, the second impurity layer as a source layer, the first electrode as a drain electrode, and the second electrode as a source electrode.