# US 2014/0191282 A1 · Semiconductor device

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- Number: US 2014/0191282 A1
- Document ID: US20140191282A1
- Status: Published application
- Kind: A1
- Application number: 14/207,200
- Filed: 2014-03-12
- Published: 2014-07-10
- Earliest claimed: 2010-09-21
- Assignees: Kabushiki Kaisha Toshiba
- Applicants: Kabushiki Kaisha Toshiba
- Inventors: Mitsuhiko KITAGAWA
- Web page: https://patentgrep.com/patent/US20140191282A1

## CPC

- H10D 84/617: {Combinations of vertical BJTs and only diodes}
- H10D 8/00: Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00)
- H10D 8/50: PIN diodes
- H10D 12/481: {having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs}
- H10D 62/8325: {Silicon carbide}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

According to one embodiment, a semiconductor device includes a base layer, a second conductivity type semiconductor layer, a first insulating film, and a first electrode. The first insulating film is provided on an inner wall of a plurality of first trenches extending from a surface of the second conductivity type semiconductor layer toward the base layer side, but not reaching the base layer. The first electrode is provided in the first trench via the first insulating film, and provided in contact with a surface of the second conductivity type semiconductor layer. The second conductivity type semiconductor layer includes a first second conductivity type region, and a second second conductivity type region. The first second conductivity type region is provided between the first trenches. The second second conductivity type region is provided between the first second conductivity type region and the base layer, and between a bottom part of the first trench and the base layer. The second second conductivity type region is smaller in a quantity of second conductivity type impurities than the first second conductivity type region.

## Claims

### Claim 1

A semiconductor device, comprising a transistor cell and a diode cell connected in parallel between a first electrode and a second electrode, the first electrode provided on a first face side of a first conductivity type base layer, the second electrode provided on a second face side opposite to the first face,
the transistor cell including:
a second conductivity type base layer provided on the first conductivity type base layer;
a first conductivity type semiconductor region provided on the second conductivity type base layer, and in contact with the first electrode; and
a gate electrode provided in the second conductivity type base layer via a gate insulating film;
the diode cell including:
a second conductivity type semiconductor layer provided on the first conductivity type base layer; and
a plurality of buried electrodes provided in the second conductivity type semiconductor layer via an insulating film, the buried electrodes being connected with the first electrode, the first electrode having a plurality of first parts, each of the first parts being connected to each of the buried electrodes;
the second conductivity type semiconductor layer including:
a first region contacting the first electrode, the first region having a part provided between the first parts; and
a second region having a part provided between the buried electrodes, and a part provided between the buried electrode and the first conductivity type base layer.

### Claim 2 (depends on 1)

The device according to claim 1, wherein the second region is lower in concentration of second conductivity type impurities than the first region.

### Claim 3 (depends on 1)

The device according to claim 1, wherein a thickness of the second region is smaller than a length from a top of the first region to a bottom of the second region.

### Claim 4 (depends on 1)

The device according to claim 1, wherein an width of the first region is not more than 1 micrometer.

### Claim 5 (depends on 1)

The device according to claim 1, wherein the second region does not contact the first electrode and the buried electrode.