# US 2014/0191250 A1 · Method for manufacturing semiconductor device, and semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0191250 A1 - Document ID: US20140191250A1 - Status: Published application - Kind: A1 - Application number: 14/234,476 - Filed: 2012-07-27 - Published: 2014-07-10 - Earliest claimed: 2011-07-28 - Assignees: Nissan Motor Co., Ltd.; Fuji Electric Co., Ltd.; Sanken Electric Co., Ltd.; Sumitomo Metal Mining Co., Ltd. - Inventors: Satoshi Tanimoto; Yusuke Zushi; Yoshinori Murakami; Takashi Iseki; Masato Takamori; Shinji Sato; Kohei Matsui - Web page: https://patentgrep.com/patent/US20140191250A1 ## CPC - H10D 62/8303: {Diamond} - B23K 1/0016: {Soldering of electronic components} - B23K 1/008: Soldering within a furnace (B23K1/012 takes precedence) - B23K 1/19: taking account of the properties of the materials to be soldered - B23K 1/206: {Cleaning} - B23K 35/007: {at least one of the workpieces being of copper or another noble metal} - B23K 35/025: {Pastes, creams or slurries} - B23K 35/282: {Zn as the principal constituent} - B23K 35/286: {Al as the principal constituent} - C22C 18/04: with aluminium as the next major constituent - H10D 62/8325: {Silicon carbide} - H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN} - B23K 2101/34: Coated articles {; Surface treated articles} - B23K 2101/40: Semiconductor devices - B23K 2101/42: Printed circuits - H10W 72/07304: {the auxiliary member being temporary, e.g. a sacrificial coating} - H10W 72/07332: {Compression bonding, e.g. thermocompression bonding} - H10W 72/07336: {Soldering or alloying} - H10W 72/352: {comprising metals or metalloids, e.g. solders} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - B23K: SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM - C22C: ALLOYS (treatment of alloys C21D, C22F) - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A method for manufacturing a semiconductor device is carried out by readying each of a semiconductor element, a substrate having Cu as a principal element at least on a surface, and a ZnAl solder chip having a smaller shape than that of the semiconductor element; disposing the semiconductor element and the substrate so that respective bonding surfaces face each other, and sandwiching the ZnAl eutectic solder chip between the substrate and the semiconductor element; increasing the temperature of the ZnAl solder chip sandwiched between the substrate and the semiconductor element while applying a load to the ZnAl solder chip such that the ZnAl solder chip melts to form a ZnAl solder layer; and reducing the temperature of the ZnAl solder layer while applying a load to the ZnAl solder layer. ## Claims ### Claim 1 A method for manufacturing a semiconductor device, comprising: readying each of a semiconductor element, a substrate having Cu as a principal element at least on a surface, and a ZnAl eutectic solder chip having a smaller shape than that of the semiconductor element; disposing the semiconductor element and the substrate so that respective bonding surfaces face each other, and sandwiching the ZnAl eutectic solder chip between the substrate and the semiconductor element; increasing the temperature of the ZnAl eutectic solder chip sandwiched between the substrate and the semiconductor element while applying a load to the ZnAl eutectic solder chip such that the ZnAl eutectic solder chip melts to form a ZnAl solder layer; and reducing the temperature of the ZnAl solder layer while applying a load to the ZnAl solder layer such that an eutectic phase structure content of the ZnAl solder layer is entirely decreased in comparison to an eutectic phase structure content of the ZnAl eutectic solder chip. ### Claim 2 (depends on 1) The method for manufacturing a semiconductor device according to claim 1, wherein reducing of the temperature includes maintaining the temperature, or reducing the temperature at a gradual pace, immediately below the eutectoid temperature of the ZnAl solder layer. ### Claim 3 (depends on 1) The method for manufacturing a semiconductor device according to claim 1, wherein the load is no less than 0.1 g/mm2. ### Claim 4 (depends on 1) The method for manufacturing a semiconductor device according to claim 1, wherein a maximum melting temperature of the ZnAl eutectic solder chip is no less than the liquidus temperature of the ZnAl eutectic solder chip and no greater than 420° C. ### Claim 5 (depends on 4) The method for manufacturing a semiconductor device according to claim 4, wherein the temperature is held at the maximum melting temperature for 5 minutes or less. ### Claim at position 6 6-7. (canceled) ### Claim 8 (depends on 2) The method for manufacturing a semiconductor device according to claim 2, wherein the load is no less than 0.1 g/mm2. ### Claim 9 (depends on 8) The method for manufacturing a semiconductor device according to claim 8, wherein a maximum melting temperature of the ZnAl eutectic solder chip is no less than the liquidus temperature of the ZnAl eutectic solder chip and no greater than 420° C. ### Claim 10 (depends on 9) The method for manufacturing a semiconductor device according to claim 9, wherein the temperature is held at the maximum melting temperature for 5 minutes or less. ### Claim 11 (depends on 2) The method for manufacturing a semiconductor device according to claim 2, wherein a maximum melting temperature of the ZnAl eutectic solder chip is no less than the liquidus temperature of the ZnAl eutectic solder chip and no greater than 420° C. ### Claim 12 (depends on 11) The method for manufacturing a semiconductor device according to claim 11, wherein the temperature is held at the maximum melting temperature for 5 minutes or less. ### Claim 13 (depends on 3) The method for manufacturing a semiconductor device according to claim 3, wherein a maximum melting temperature of the ZnAl eutectic solder chip is no less than the liquidus temperature of the ZnAl eutectic solder chip and no greater than 420° C. ### Claim 14 (depends on 13) The method for manufacturing a semiconductor device according to claim 13, wherein the temperature is held at the maximum melting temperature for 5 minutes or less. ### Claim 15 A semiconductor device comprising: a substrate; a semiconductor element; and a ZnAl solder layer sandwiched between the semiconductor element and the substrate, the ZnAl solder layer having an eutectic phase structure content that is no greater than 20%. relative to an entire content of the ZnAl solder layer. ### Claim 16 (depends on 15) The semiconductor device according to claim 15, wherein the semiconductor element has, as a base body, a wide bandgap semiconductor containing silicon carbide (SiC), gallium nitride (GaN) and diamond (C).