# US 2014/0191248 A1 · Semiconductor device

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- Number: US 2014/0191248 A1
- Document ID: US20140191248A1
- Status: Published application
- Kind: A1
- Application number: 14/147,048
- Filed: 2014-01-03
- Published: 2014-07-10
- Earliest claimed: 2013-01-09
- Assignees: Toyota Jidosha Kabushiki Kaisha
- Inventors: Hidefumi Takaya; Masaru Nagao; Narumasa Soejima
- Web page: https://patentgrep.com/patent/US20140191248A1

## CPC

- H10D 30/63: Vertical IGFETs (H10D30/66 {, H10D30/6728, H10D30/689, H10D30/693} take precedence)
- H10D 30/665: {having edge termination structures}
- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 62/106: {having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions}
- H10D 62/107: {Buried supplementary regions, e.g. buried guard rings (multi-RESURF H10D62/111)}
- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10D 89/601: {for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs}
- H10D 62/104: {having particular shapes of the bodies at or near reverse-biased junctions, e.g. having bevels or moats}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device includes: a semiconductor substrate that has an element region and a peripheral region that surrounds the element region; and a gate pad that is disposed in an area that is on a surface side of the semiconductor substrate. The element region is formed with an insulated gate semiconductor element that has a gate electrode. The peripheral region is formed with a first withstand voltage retaining structure that surrounds the element region and a second withstand voltage retaining structure that is located in a position on the first withstand voltage retaining structure side from an outer edge of the element region and on the element region side from a boundary of the first withstand voltage retaining structure on the element region side. The gate pad is electrically connected to the gate electrode and is disposed in an area in which the second withstand voltage retaining structure is formed.

## Claims

### Claim 1

A semiconductor device comprising:
a semiconductor substrate that has an element region and a peripheral region that surrounds the element region; and
a gate pad that is disposed in an area that is on a surface side of the semiconductor substrate, wherein
an insulated gate semiconductor element that has a gate electrode is formed in the element region,
the peripheral region is formed with a first withstand voltage retaining structure that surrounds the element region and a second withstand voltage retaining structure that is located in a position on the first withstand voltage retaining structure side from an outer edge of the element region and on the element region side from a boundary of the first withstand voltage retaining structure on the element region side, and
the gate pad is electrically connected to the gate electrode and is disposed in an area in which the second withstand voltage retaining structure is formed.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein the first withstand voltage retaining structure has at least one end trench that extends from a surface of the semiconductor substrate in a depth direction.

### Claim 3 (depends on 2)

The semiconductor device according to claim 2,
wherein the element region is formed with: a body region of a first conductive type that is disposed in an area that faces an upper surface of the semiconductor substrate; a drift region of a second conductive type that is in contact with a lower surface of the body region; the gate electrode disposed in a gate trench that penetrates the body region and extends to the drift region and facing the body region; an insulator that is disposed between the gate electrode and an inner wall of the gate trench; and a floating region of a first conductive type that surrounds a bottom of the gate trench and is surrounded by the drift region.

### Claim 4 (depends on 3)

The semiconductor device according to claim 3, wherein
the peripheral region is formed with the body region of the first conductive type that is disposed in the area facing the upper surface of the semiconductor substrate and the drift region of the second conductive type that faces the lower surface of the body region,
the first withstand voltage retaining structure is the end trench that penetrates the body region from the surface of the semiconductor device and extends to the drift region, and
the end trench has the floating region of the first conductive type that surrounds a bottom of the at least one end trenches and is surrounded by the drift region.

### Claim 5 (depends on 4)

The semiconductor device according to claim 4, wherein
the second withstand voltage retaining structure is the trench that penetrates the body region from the surface of the semiconductor substrate and extends to the drift region, and
the trench has the floating region of the first conductive type that surrounds a bottom of the trench and is surrounded by the drift region.

### Claim 6 (depends on 4)

The semiconductor device according to claim 4,
wherein the second withstand voltage retaining structure has the floating region of the first conductive type that is formed in the drift region.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1,
wherein the semiconductor substrate is made of SiC.