# US 2014/0191244 A1 · METHOD FOR CONDUCTIVITY CONTROL OF (Al,In,Ga,B)N

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- Number: US 2014/0191244 A1
- Document ID: US20140191244A1
- Status: Published application
- Kind: A1
- Application number: 14/205,947
- Filed: 2014-03-12
- Published: 2014-07-10
- Earliest claimed: 2006-02-10
- Assignees: The Regents of the University of California
- Applicants: The Regents of the University of California
- Inventors: John F. Kaeding; Hitoshi Sato; Michael Iza; Hirokuni Asamizu; Hong Zhong; Steven P. DenBaars; Shuji Nakamura
- Web page: https://patentgrep.com/patent/US20140191244A1

## CPC

- H10P 30/206: {into Group III-V semiconductors}
- H10D 62/405: {Orientations of crystalline planes}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 62/854: further characterised by the dopants
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/2921: {being crystalline insulating materials}
- H10P 14/2926: {Crystal orientations}
- H10P 14/3416: {Nitrides}
- H10P 14/3444: {P-type}
- H10P 14/3466: {Crystal orientation}
- H10P 30/208: {of electrically inactive species}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method of controlled p-type conductivity in (Al,In,Ga,B)N semiconductor crystals. Examples include {10 11} GaN films deposited on {100} MgAl2O4 spinel substrate miscut in the <011> direction. Mg atoms may be intentionally incorporated in the growing semipolar nitride thin film to introduce available electronic states in the band structure of the semiconductor crystal, resulting in p-type conductivity. Other impurity atoms, such as Zn or C, which result in a similar introduction of suitable electronic states, may also be used.

## Claims

### Claim 1

A method of fabricating a semipolar or nonpolar III-nitride semiconductor, comprising:
controlling a p-type conductivity of the semipolar or nonpolar III-nitride semiconductor, by controlling a hole concentration and a hole mobility in the semipolar or nonpolar III-nitride semiconductor, wherein the hole concentration is approximately at least 10 percent of an acceptor impurity concentration in the semipolar or nonpolar III-nitride semiconductor.

### Claim 2 (depends on 1)

The method of claim 1, wherein the III-nitride semiconductor is the semipolar III-nitride semiconductor.

### Claim 3 (depends on 1)

The method of claim 1, wherein the III-nitride semiconductor is deposited on a miscut substrate, the method further comprising selecting a miscut angle of a miscut substrate, in order to obtain the desired hole concentration and hole mobility.

### Claim 4 (depends on 1)

The method of claim 1, wherein the III-nitride semiconductor is the nonpolar III-nitride semiconductor.

### Claim 5 (depends on 1)

The method of claim 1, wherein the fabricating further comprises incorporating dopants either intentionally or unintentionally in the semipolar or nonpolar III-nitride semiconductor.

### Claim 6 (depends on 5)

The method of claim 5, wherein the doping comprises varying a flow of Cp2Mg during doping and the flow is varied between 0 and 0.3 μmol/minute.

### Claim 7 (depends on 5)

The method of claim 5, further comprising performing a subsequent thermal annealing step, after growing and doping the III-nitride semiconductor, that alters a concentration of unintentional impurity atoms within the III-nitride semiconductor, and results in an improvement in conductivity of the III-nitride semiconductor.

### Claim 8 (depends on 7)

The method of claim 7, wherein the annealing is to a temperature between 550° C.-850° C.

### Claim 9 (depends on 7)

The method of claim 7, wherein the annealing is above 800° C. or at a temperature such that the hole mobility is at least 8 cm2/V s.

### Claim 10 (depends on 1)

The method of claim 1, wherein the semipolar or nonpolar III-nitride semiconductor is Gallium Nitride and the hole concentration is 10-100% of the acceptor impurity concentration.

### Claim 11 (depends on 1)

The method of claim 1, further comprising:
(a) fabricating the semiconductor III-nitride using an acceptor impurity doped semipolar or nonpolar III-nitride semiconductor; and
(b) controlling the hole concentration and the hole mobility of the acceptor impurity doped semipolar or nonpolar III-nitride semiconductor, thereby controlling the concentration of the acceptor impurity.

### Claim 12

A semipolar or nonpolar III-nitride semiconductor, comprising:
a p-type conductivity based on a controlled hole mobility and a hole concentration in the semipolar or nonpolar III-nitride semiconductor, wherein the hole concentration is approximately at least 10 percent of an acceptor impurity concentration in the semipolar or nonpolar III-nitride semiconductor.

### Claim 13 (depends on 12)

The semiconductor of claim 12, wherein the III-nitride semiconductor is the nonpolar III-nitride semiconductor.

### Claim 14 (depends on 12)

The semiconductor of claim 12, wherein the III-nitride semiconductor is the semipolar III-nitride semiconductor.

### Claim 15 (depends on 14)

The semiconductor of claim 14, wherein the semipolar III-nitride semiconductor comprises Gallium Nitride (GaN).

### Claim 16 (depends on 15)

The semiconductor of claim 15, wherein the semipolar GaN comprises {10-1-3}, {10-1-1},{10-12}, {20-21}, {10-14}, or {11-22} GaN.

### Claim 17 (depends on 15)

The semiconductor of claim 15, wherein the semipolar GaN comprises {10-1-3} GaN.

### Claim 18 (depends on 15)

The semiconductor of claim 15, wherein the semipolar GaN comprises {10-11} GaN.

### Claim 19 (depends on 12)

The semiconductor of claim 12, wherein the III-nitride semiconductor comprises has the hole mobility of at least 8 cm2/V s.

### Claim 20 (depends on 19)

The semiconductor of claim 19, further comprising a hole mobility of 8-14 cm2/V s.

### Claim 21 (depends on 12)

The semiconductor of claim 12, wherein the III-nitride semiconductor is fabricated using a process comprising:
growing the semipolar or nonpolar III-nitride semiconductor by Metal Organic Chemical Vapor Deposition on a substrate crystal orientation, comprising:
selecting and flowing gas flows chosen from a plurality of nitrogen, hydrogen, ammonia, Trimethylgallium (TMGa), and Trimethylaluminum (TMAl),
setting a pressure between 10 torr and 1000 torr, and
setting a temperature between 400° C. and 1400° C.;
controlling a Cp2Mg flow during the growing, thereby doping the semipolar or nonpolar III-nitride semiconductor; and
annealing the semipolar or nonpolar III-nitride semiconductor in a hydrogen deficient gas for an anneal time.

### Claim 22 (depends on 12)

The semiconductor of claim 12, wherein:
the semipolar or nonpolar III-nitride semiconductor is Gallium Nitride,
the hole concentration is at least as high as a hole concentration in a semipolar or nonpolar III-nitride semiconductor fabricated using a process comprising:
growing the semipolar or nonpolar III-nitride semiconductor by Metal Organic Chemical Vapor Deposition on a substrate crystal orientation, comprising:
selecting and flowing gas flows chosen from a plurality of nitrogen, hydrogen, ammonia, Trimethylgallium (TMGa), and Trimethylaluminum (TMAl),
setting a pressure between 10 torr and 1000 torr, and
setting a temperature between 400° C. and 1400° C.;
controlling a Cp2Mg flow during the growing, thereby doping the semipolar or nonpolar III-nitride semiconductor; and
annealing the semipolar or nonpolar III-nitride semiconductor in a hydrogen deficient gas for an anneal time to a temperature between 550° C.-850° C.

### Claim 23 (depends on 12)

The semiconductor of claim 12, wherein the semipolar or nonpolar III-nitride semiconductor is Gallium Nitride and the hole concentration is 10-100% of the acceptor impurity concentration.

### Claim 24 (depends on 12)

The semiconductor of claim 12, wherein the hole concentration is at least 1018 cm−3.

### Claim 25

A method of fabricating a III-nitride semiconductor, comprising:
doping an acceptor impurity into a nonpolar or semipolar III-nitride semiconductor; and
performing a subsequent thermal annealing step, resulting in an improvement in a conductivity of the acceptor impurity doped nonpolar or semipolar III-nitride semiconductor.