# US 2014/0191236 A1 · Methods and Devices for Fabricating and Assembling Printable Semiconductor Elements

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- Number: US 2014/0191236 A1
- Document ID: US20140191236A1
- Status: Published application
- Kind: A1
- Application number: 14/155,010
- Filed: 2014-01-14
- Published: 2014-07-10
- Earliest claimed: 2004-06-04
- Assignees: The Board of Trustees of the University of IIIinois
- Inventors: Ralph G. NUZZO; John A. ROGERS; Etienne MENARD; Keon Jae LEE; Dahl-Young KHANG; Yugang SUN; Matthew MEITL; Zhengtao ZHU
- Web page: https://patentgrep.com/patent/US20140191236A1

## CPC

- H10D 48/36: Unipolar devices
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- H10D 30/675: {Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 30/6758: {characterised by the insulating substrates}
- H10D 62/10: Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D 62/118: {Nanostructure semiconductor bodies}
- H10D 62/121: {oriented parallel to substrates}
- H10D 62/122: {oriented at angles to substrates, e.g. perpendicular to substrates}
- H10D 62/123: {comprising junctions}
- H10D 62/40: Crystalline structures
- H10D 62/81: of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
- H10D 86/0229: {characterised by control of the annealing or irradiation parameters}
- H10D 86/0241: {using liquid deposition, e.g. printing}
- H10F 71/121: {The active layers comprising only Group IV materials}
- H10F 71/128: {Annealing}
- H10F 71/1395: {for thin-film devices}
- H10F 77/169: Thin semiconductor films on metallic or insulating substrates
- H10F 77/1698: {the metallic or insulating substrates being flexible}
- H10H 20/01335: {the light-emitting regions comprising nitride materials}
- H10H 20/018: {Bonding of wafers}
- H10H 20/825: containing nitrogen, e.g. GaN
- H10P 14/265: {using solutions}
- H10P 14/3402: {characterised by the chemical composition}
- H10P 14/3462: {Nanowires}
- H10P 36/00: Gettering within semiconductor bodies
- H10P 50/691: {for Group IV materials or Group III-V materials}
- H10P 72/74: {using temporarily an auxiliary support}
- H10W 76/10: Containers or parts thereof
- H10W 90/00: Package configurations
- B81C 2201/0185: Printing, e.g. microcontact printing
- H10P 72/7434: {used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate}
- H10P 72/744: {Details of chemical or physical process used for separating the auxiliary support from a device or a wafer}
- H10W 72/019: {of bond pads}
- H10W 72/01923: {in liquid form, e.g. by dispensing droplets or by screen printing}
- H10W 72/01938: {in gaseous form, e.g. by CVD or PVD}
- H10W 72/01951: {Changing the shapes of bond pads}
- H10W 72/01953: {by etching}
- H10W 72/0198: {batch processes}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07307: {the auxiliary member being a temporary substrate, e.g. a removable substrate}
- H10W 72/07323: {Active alignment, e.g. using optical alignment using marks or sensors}
- H10W 72/07337: {using a polymer adhesive, e.g. an adhesive based on silicone or epoxy}
- H10W 72/07338: {hardening the adhesive by curing, e.g. thermosetting}
- H10W 72/354: {comprising polymers}
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/932: {Plan-view shape, i.e. in top view}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 80/163: {using active alignment, e.g. detecting marks and correcting position}
- H10W 80/211: {using auxiliary members, e.g. aids for protecting the bonding area}
- H10W 80/312: {characterised by the direct bonding of electrically conductive pads}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/794: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 99/00: Subject matter not provided for in other groups of this subclass
- Y02E 10/547: Monocrystalline silicon PV cells
- Y02P 70/50: Manufacturing or production processes characterised by the final manufactured product
- Y10S 977/707: having different types of nanoscale structures or devices on a common substrate
- Y10S 977/724: Devices having flexible or movable element
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- B81C: PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS (making microcapsules or microballoons B01J13/02; processes or apparatus specially adapted for the manufacture or treatment of piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/01)
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

## Claims

### Claim at position 1

-19. (canceled)

### Claim 20

A stretchable semiconductor element comprising:
an elastic substrate having a supporting surface; and
a stretchable semiconductor structure having a curved internal surface, wherein said stretchable semiconductor structure is a single crystalline semiconductor material, wherein said curved internal surface is bonded to said supporting surface at substantially all points along said curved internal surface while said elastic substrate is in an expanded state, wherein said curved internal surface has at least one convex region and at least one concave region, and wherein said stretchable semiconductor structure comprises a bent structure under strain resulting from application of a force arising from allowing said elastic substrate to relax from the expanded state.

### Claim 21 (depends on 20)

The stretchable semiconductor element of claim 20 wherein said stretchable semiconductor structure is in a bent conformation.

### Claim 22 (depends on 20)

The stretchable semiconductor element of claim 20 wherein said curved internal surface has a contour profile characterized by a periodic wave.

### Claim 23 (depends on 20)

The stretchable semiconductor element of claim 20 wherein said curved internal surface has a contour profile characterized by an aperiodic wave.

### Claim 24 (depends on 20)

The stretchable semiconductor element of claim 20 wherein said stretchable semiconductor structure comprises a ribbon in a bent configuration having a contour profile characterized by a periodic wave extending the length of said ribbon.

### Claim 25 (depends on 24)

The stretchable semiconductor element of claim 24 wherein said bent ribbon has a width selected over the range of about 5 microns to about 50 microns and a thickness selected over the range of about 50 nanometers to about 500 nanometers.

### Claim 26 (depends on 20)

The stretchable semiconductor element of claim 20 wherein said elastic substrate comprises poly(dimethylsiloxane).

### Claim 27 (depends on 20)

The stretchable semiconductor element of claim 20 wherein said elastic substrate has a thickness equal to about 1 millimeter.

### Claim 28 (depends on 20)

The stretchable semiconductor element of claim 20 wherein said stretchable semiconductor structure is an inorganic semiconductor material.

### Claim 29 (depends on 20)

The stretchable semiconductor element of claim 20 wherein said stretchable semiconductor structure comprises single crystalline silicon.

### Claim 30

A method for making a stretchable semiconductor element, said method comprising the steps of:
providing a single crystalline semiconductor structure having an internal surface;
providing an elastic substrate in an expanded state, wherein said elastic substrate has an external surface; and
bonding substantially all points along said internal surface of said single crystalline semiconductor structure to said external surface of said elastic substrate in an expanded state; and
allowing said elastic substrate to at least partially relax to a relaxed state, wherein relaxation of the elastic substrate bends the internal surface of said single crystalline semiconductor structure, thereby generating said stretchable semiconductor element having a curved internal surface.

### Claim 31 (depends on 30)

The method of claim 30 wherein said elastic substrate is expanded along a first axis.

### Claim 32 (depends on 31)

The method of claim 31 wherein said elastic substrate is expanded along a second axis orthogonal to said first axis.

### Claim 33 (depends on 30)

The method of claim 30 wherein said elastic substrate in an expanded state is formed by bending said elastic substrate.

### Claim 34 (depends on 30)

The method of claim 30 wherein said elastic substrate in an expanded state is formed by rolling said elastic substrate.

### Claim 35 (depends on 30)

The method of claim 30 further comprising the step of transferring said semiconductor having a curved internal surface to a receiving substrate that is flexible.

### Claim 36 (depends on 30)

The method of claim 30 wherein bonding at least a portion of said internal surface of said crystalline semiconductor structure to said external surface of said prestrained elastic substrate is provided by covalent bonding between said single crystalline semiconductor structure and said external surface of said elastic substrate, van der Waals interactions between said single crystalline semiconductor structure and said external surface of said elastic substrate or an adhesive layer between said single crystalline semiconductor structure and said external surface of said elastic substrate.

### Claim 37 (depends on 30)

The method of claim 30 wherein said external surface of said elastic substrate has a plurality of hydroxyl groups to provide bonding between said single crystalline semiconductor structure and said external surface of said elastic substrate.

### Claim 38

A stretchable electrical circuit comprising:
an elastic substrate having a supporting surface; and
an electrical circuit having a curved internal surface, wherein the electrical circuit comprises at least one stretchable semiconductor structure, wherein said at least one stretchable semiconductor structure is a single crystalline semiconductor material, wherein substantially all points along said curved internal surface of said electrical circuit is bonded to said supporting surface of said elastic substrate while said elastic substrate is in an expanded state, wherein said electrical circuit is in a bent conformation, and wherein said electrical circuit having said curved internal surface is under strain resulting from application of a force arising from allowing said elastic substrate to relax from the expanded state.

### Claim 39 (depends on 38)

The stretchable electrical circuit of claim 38 wherein said electrical circuit comprises a plurality of integrated device components.

### Claim 40 (depends on 38)

The stretchable electrical circuit of claim 38 wherein said integrated device components are selected from the group consisting of: a semiconductor element; a dielectric element; an electrode; a conductor element; and a doped semiconductor element.

### Claim 41 (depends on 38)

The stretchable electrical circuit of claim 38 wherein said curved internal surface has a contour profile characterized by a periodic wave.

### Claim 42 (depends on 38)

The stretchable electrical circuit of claim 38 wherein said curved internal surface has a contour profile characterized by an aperiodic wave.

### Claim 43

A method for making a stretchable electrical circuit, said method comprising the steps of:
providing a electrical circuit comprising a single crystalline semiconductor structure, the electrical circuit having an internal surface;
providing an elastic substrate in an expanded state, wherein said elastic substrate has an external surface; and
bonding substantially all points along said internal surface of said printable electrical circuit to said external surface of said elastic substrate in an expanded state; and
allowing said elastic substrate to relax at least partially to a relaxed state, wherein relaxation of the elastic substrate bends the internal surface of said electrical circuit comprising said single crystalline semiconductor structure which generates at least one curve of said internal surface and said single crystalline semiconductor structure, thereby making said stretchable electrical circuit.

### Claim 44 (depends on 43)

The method of claim 43 wherein said electrical circuit comprises a plurality of integrated device components.

### Claim 45 (depends on 43)

The method of claim 43 wherein said integrated device components are selected from the group consisting of: a semiconductor element; a dielectric element; an electrode; a conductor element; and a doped semiconductor element.