# US 2014/0191231 A1 · Display device and method of manufacturing the same

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- Number: US 2014/0191231 A1
- Document ID: US20140191231A1
- Status: Published application
- Kind: A1
- Application number: 14/206,858
- Filed: 2014-03-12
- Published: 2014-07-10
- Earliest claimed: 2011-02-08
- Assignees: Japan Display Inc.
- Applicants: Japan Display Inc.
- Inventors: Tetsuya SHIBATA; Hajime Watakabe; Atsushi Sasaki; Yuki Matsuura; Muneharu Akiyoshi; Hiroyuki Watanabe
- Web page: https://patentgrep.com/patent/US20140191231A1

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- H10D 30/6704: {having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

According to one embodiment, a method of manufacturing a thin-film transistor circuit substrate including forming an oxide semiconductor thin film above an insulative substrate, forming a gate insulation film and a gate electrode which are stacked on a first region of the oxide semiconductor thin film, and exposing from the gate insulation film a second region and a third region of the oxide semiconductor thin film, the second region and the third region being located on both sides of the first region of the oxide semiconductor thin film, forming an interlayer insulation film of silicon nitride including dangling bonds of silicon, the interlayer insulation film covering the second region and the third region of the oxide semiconductor thin film, the gate insulation film and the gate electrode, and forming a source electrode and a drain electrode.

## Claims

### Claim at position 1

1-15. (canceled)

### Claim 16

A display device comprising:
an oxide semiconductor thin film including a first region, and a second region and a third region which are formed on both sides of the first region and have a lower resistance than the first region;
a gate electrode opposed to the first region;
a gate insulation film positioned between the oxide semiconductor thin film and the gate electrode;
a first interlayer insulation film of silicon nitride, which covers the second region and the third region of the oxide semiconductor thin film and the gate electrode;
a source electrode which is in contact with the second region; and
a drain electrode which is in contact with the third region,
wherein in the first interlayer insulation film covering the second region and the third region, an oxygen concentration of an end portion which is in contact with the oxide semiconductor thin film is higher than an oxygen concentration of a central portion which is located at a position corresponding to ½ of a thickness of the first interlayer insulation film.

### Claim 17 (depends on 16)

The display device according to claim 16, wherein in the oxide semiconductor thin film, an oxygen concentration of the second region and the third region is lower than an oxygen concentration of the first region.

### Claim 18 (depends on 16)

The display device according to claim 16, wherein the first interlayer insulation film includes, at least in the end portion, dangling bonds of silicon.

### Claim 19 (depends on 18)

The display device according to claim 18, wherein in the first interlayer insulation film, a central portion which is located at a position corresponding to ½ of a thickness of the first interlayer insulation film includes a greater number of dangling bonds of silicon than the end portion.

### Claim 20 (depends on 16)

The display device according to claim 16, wherein the oxide semiconductor thin film is formed of an oxide including at least one of indium (In), gallium (Ga), and zinc (Zn).