# US 2014/0191180 A1 · Low temperature p+ polycrystalline silicon material for non-volatile memory device

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- Number: US 2014/0191180 A1
- Document ID: US20140191180A1
- Status: Published application
- Kind: A1
- Application number: 14/188,622
- Filed: 2014-02-24
- Published: 2014-07-10
- Earliest claimed: 2012-04-20
- Assignees: Crossbar, Inc.
- Applicants: Crossbar, Inc.
- Inventors: Xin SUN; Sung Hyun JO; Tanmay KUMAR
- Web page: https://patentgrep.com/patent/US20140191180A1

## CPC

- H10N 70/883: {Oxides or nitrides}
- H10B 63/80: {Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays}
- H10N 70/023: {by chemical vapor deposition, e.g. MOCVD, ALD}
- H10N 70/063: {by etching of pre-deposited switching material layers, e.g. lithography}
- H10N 70/245: {the species being metal cations, e.g. programmable metallization cells}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/8833: {Binary metal oxides, e.g. TaOx}
- H10N 70/884: {based on at least one element of group IIIA, IVA or VA, e.g. elemental or compound semiconductors (compounds of sulfur, selenium or tellurium, e.g. chalcogenides H10N70/882; oxides or nitrides H10N70/883)}
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/3211: {Silicon, silicon germanium or germanium}
- H10P 14/3411: {Silicon, silicon germanium or germanium}
- H10P 14/3444: {P-type}
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B: ELECTRONIC MEMORY DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method of forming a non-volatile memory device. The method includes providing a substrate having a surface region and forming a first dielectric material overlying the surface region of the substrate. A first electrode structure is formed overlying the first dielectric material and a p+ polycrystalline silicon germanium material is formed overlying the first electrode structure. A p+ polycrystalline silicon material is formed overlying the first electrode structure using the polycrystalline silicon germanium material as a seed layer at a deposition temperature ranging from about 430 Degree Celsius to about 475 Degree Celsius without further anneal. The method forms a resistive switching material overlying the polycrystalline silicon material, and a second electrode structure including an active metal material overlying the resistive switching material.

## Claims

### Claim 1

A memory device, comprising:
a first electrode;
a second electrode having a portion comprising an active conductive material;
a resistive switching material configured in an intersection region between the first electrode and the second electrode; and
a buffer layer material comprising two or more silicon-bearing materials having a p+ impurity characteristic disposed in between the first electrode and the resistive switching material.

### Claim 2 (depends on 1)

The device of claim 1 wherein the second electrode comprises a metal material selected from a group consisting of: silver, copper, tungsten, aluminum, or a combination.

### Claim 3 (depends on 1)

The device of claim 1 wherein the resistive switching material comprises a silicon material having an intrinsic semiconductor characteristic.

### Claim 4 (depends on 3)

The device of claim 3 wherein the silicon material having the intrinsic semiconductor characteristic comprises an amorphous silicon material or an amorphous silicon germanium material.

### Claim 5 (depends on 1)

The device of claim 1 wherein the resistive switching material comprises a zinc oxide material.

### Claim 6 (depends on 1)

The device of claim 1 wherein the buffer layer material comprising one or more silicon material having a p+ impurity characteristic comprises a polycrystalline p+ silicon germanium material, or a polycrystalline p+ silicon material or a combination.

### Claim 7 (depends on 6)

The device of claim 6 wherein the polycrystalline p+ silicon germanium material and the polycrystalline p+ silicon material are each characterized by a work function to cause an energy barrier between the active conductive material particles and the polycrystalline p+ silicon germanium material and the polycrystalline p+ silicon material to provide for an controllable on-state current absent of a current compliance upon application of a first voltage.

### Claim 8 (depends on 7)

The device of claim 7 wherein the first voltage is a forward bias voltage comprising of a positive voltage applied to the second electrode with respect to the first electrode upon programming to cause a filament structure derived from the active conductor material to form in a portion of the resistive switching material.

### Claim 9 (depends on 8)

The device of claim 8 wherein the filament structure is configured to retract upon application of a backward bias voltage comprising of a negative voltage applied to the second electrode with respect to the first electrode after programming.