Single serdes transmitter driver design for both ethernet and peripheral component interconnect express applications
AssigneeLSI Corporation
InventorsTai Jing, Lijun Li, Shiva Prasad Kotagiri
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AssigneeLSI Corporation
InventorsTai Jing, Lijun Li, Shiva Prasad Kotagiri
Estimating the term…
An apparatus includes a first coding circuit, a second coding circuit, and a plurality of source series terminated driver slices. The first coding circuit may be configured to generate a plurality of digital filter control codes in response to a plurality of filter coefficients and a control signal. The control signal selects between a plurality of communication specifications. The second coding circuit may be configured to generate a plurality of driver slice control codes in response to the plurality of digital filter control codes. The plurality of source series terminated driver slices configured to generate an output signal according to a selected one of the plurality of communication specifications in response to the plurality of driver slice control codes, a main cursor signal, a pre-cursor signal, and a post cursor signal.
An apparatus comprising:
An apparatus for generating a serial output signal comprising:
A method for generating a serial output signal comprising:
Dependencies are inferred from the claim text.