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US 2014/0181821 A1Published application
Methods and Systems for Enhancing Hardware Transactions Using Hardware Transactions in Software Slow-Path
AssigneeMassachusetts Institute of Technology
InventorsNir N. Shavit, Alexander Matveev
Life of this patent
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Abstract
Hybrid transaction memory systems and accompanying methods. A transaction to be executed is received, and an initial attempt is made to execute the transaction in a hardware path. Upon a failure to successfully execute the transaction in the hardware path, an attempt is made to execute the transaction in a hardware-software path. The hardware-software path includes a software path and at least one hardware transaction.
Claims26
A system, comprising:
- at least one processor;
- and
- at least one memory storing computer-executable instructions that, when executed by the at least one processor, configure the system to:
- receive a transaction to be executed;
- initially attempt to execute the transaction in a hardware path;
- and
- upon a failure to successfully execute the transaction in the hardware path, attempt to execute the transaction in a hardware-software path, wherein the hardware-software path comprises a software path and at least one hardware transaction.
4 more elements
In a system comprising at least one memory storing computer-executable instructions, a method comprising:
- executing the instructions by at least one processor, the execution of the instructions resulting in operations that comprise:
- receiving a transaction to be executed;
- initially attempting to execute the transaction in a hardware path;
- and
- upon a failure to successfully execute the transaction in the hardware path, attempting to execute the transaction in a hardware-software path, wherein the hardware-software path comprises a software path and at least one hardware transaction.
2 more elements
Dependencies are inferred from the claim text.