Netlist cell identification and classification to reduce power consumption
AssigneeNVIDIA Corporation
InventorTom Verbeure
Life of this patent
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Abstract
In an integrated circuit device, a power circuit for maintaining asserted values on an input output pin of the device when a functional block of the device is placed in a sleep mode. The device includes a power circuit disposed along the periphery of the device, the power circuit configured to maintain power when the device is placed in a low-power mode. A plurality of input output blocks are included in the device and are for receiving external inputs for the integrated circuit device and for providing outputs from the integrated circuit device. The power circuit is coupled to provide power to at least one of the input output blocks to maintain state when the integrated circuit device is in the low-power mode.
Claims20
In a computer implemented synthesis system, a method for modifying netlist cells of an integrated circuit device to reduce power consumption, comprising:
- accessing a circuit netlist, the circuit netlist representing an integrated circuit design to be realized in physical form;
- and
- modifying a plurality of cells of the netlist by using a per cell iterative search, wherein the iterative search functions by:
- determining those cells of the circuit netlist that are coupled to an always on power domain;
- determining those cells of the circuit netlist that are coupled to a second domain, wherein the second domain is a sleep mode enabled power domain;
- and
- configuring those cells that are coupled to the second domain to receive power from the second domain to enable shut down when the integrated circuit device enters sleep mode.
In a computer implemented synthesis system, a method for modifying netlist cells of an integrated circuit device to reduce power consumption, comprising:
- accessing a circuit netlist, the circuit netlist representing an integrated circuit design to be realized in physical form;
- and
- modifying a plurality of cells of the netlist by using a per cell iterative search, wherein the iterative search functions by:
- determining those cells of the circuit netlist that are coupled to an always on power domain;
- determining those cells of the circuit netlist that are coupled to a second domain, wherein the second domain is a sleep mode enabled power domain;
- configuring those cells that are coupled to the second domain to receive power from the second domain to enable shut down when the integrated circuit device enters sleep mode;
- and
- wherein the always on power domain is configured to retain power and selected device state data when the second domain is shut down.
In a computer implemented synthesis system, a method for modifying netlist cells of an integrated circuit device to reduce power consumption, comprising:
- accessing a circuit netlist, the circuit netlist representing an integrated circuit design to be realized in physical form;
- and
- modifying a plurality of cells of the netlist by using a per cell iterative search, wherein the iterative search functions by:
- determining those cells of the circuit netlist that are coupled to an always on power domain;
- determining those cells of the circuit netlist that are coupled to a second domain, wherein the second domain is a sleep mode enabled power domain;
- configuring those cells that are coupled to the second domain to receive power from the second domain to enable shut down when the integrated circuit device enters sleep mode;
- and
- wherein those cells that are coupled to the second domain are shut down with reduced leakage current when power to the second domain is shut down.
Dependencies are inferred from the claim text.