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US 2014/0181587 A1Published application
Hardware Based Redundant Multi-Threading Inside a GPU for Improved Reliability
AssigneeAdvabced Micro Devices, Inc.
InventorsVilas SRIDHARAN, Sudhanva Gurumurthi
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Abstract
A system and method for verifying computation output using computer hardware are provided. Instances of computation are generated and processed on hardware-based processors. As instances of computation are processed, each instance of computation receives a load accessible to other instances of computation. Instances of output are generated by processing the instances of computation. The instances of output are verified against each other in a hardware based processor to ensure accuracy of the output.
Claims27
A system comprising:
- a hardware-based compute unit configured to perform operations comprising:
- generating a first instance of computation and a second instance of computation, wherein the first and second instances of the computation are part of a workgroup comprising a plurality of wavefronts adapted for parallel execution;
- processing the first instance of computation and the second instance of computation using a plurality of hardware-based processors in the compute unit, wherein the processing generates a first instance of output associated with the first instance of computation and the second instance of output associated with the second instance of computation;
- and
- verifying accuracy of the first and second instances of output against each other in memory in the compute unit to ensure accuracy of output of the compute unit.
2 more elements
A system comprising:
- a scheduler configured to perform operations comprising generating a first and second instances of computation;
- a plurality of compute units configured to perform operations comprising:
- processing the first and second instances of computation, wherein the first and second instances of computation are processed on different compute units, wherein the first and second instances of the computation are part of a workgroup comprising a plurality of wavefronts adapted for parallel execution;
- and
- generating a first and second instances of output, the instance of output associated with the first instance of computation and the second instance of output associated with the second instance of computation;
- and
- a verification hardware configured to perform operations comprising verifying accuracy of the first and second instances of output against each other in memory to ensure accuracy of the first and second instances of output, and
- wherein the scheduler, the plurality of compute units, the verification hardware and the memory are included in a hardware-based processor.
5 more elements
A method comprising:
- generating first and second instances of computation for processing in a hardware-based environment, wherein the first and second instances of the computation are part of a workgroup comprising a plurality of wavefronts adapted for parallel execution;
- processing the first and second instances of the computation in the hardware-based environment, wherein the processing generates a first instance of output associated with the first instance of computation and the second instance of output associated with the second instance of computation;
- and
- verifying accuracy of the first and second instances of output against each other in memory in the hardware-based environment, to ensure accuracy of output of a hardware-based processor.
1 more element
A method, comprising:
- converting a task configured for processing on a sequential processor, wherein the converting further comprises:
- generating first and second instances of computation from the task, wherein the first and second instances of computation are configured for processing on a hardware-based parallel processor;
- processing the first and second instances of the computation on the hardware-based parallel processor, wherein the processing generates a first instance of output associated with the first instance of computation and the second instance of output associated with the second instance of computation;
- and
- verifying accuracy of the first and second instances of output against each other in memory in the hardware-based processor, to ensure accuracy of output of the hardware-based processor.
2 more elements
Dependencies are inferred from the claim text.