Mechanism to provide high performance and fairness in a multi-threading computer system

A method, comprising:

• executing a plurality of threads, including a first thread and a second thread;
• determining whether to switch threads between the first and second thread based on a thread switch policy that is selected from a list of thread switch policies based on unfairness levels of the first and second thread;
• and
• switching, in response to determining to switch threads, from executing the first thread to executing the second thread.

A system comprising:

• an interconnect;
• a dynamic random access memory (DRAM) coupled to the interconnect;
• and
• a processor coupled the interconnect, including
• an execution pipeline for executing a plurality of threads, including a first thread and a second thread;
• a multi-thread controller (MTC) coupled to the execution pipeline to determine whether to switch threads between the first and second thread based on a thread switch policy that is selected from a list of thread switch policies based on unfairness levels of the first and second thread, and in response to determining to switch threads, to switch from executing the first thread to executing the second thread.