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US 2014/0181439 A1Published application
Memory system
AssigneeSK hynix Inc.
InventorsYoung Suk MOON, Hyung Dong Lee, Yong Kee Kwon, Hyung Gyun Yang
Life of this patent
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Abstract
A memory system includes a processor, one or more volatile memory dies stacked with the processor and one or more nonvolatile memory dies stacked with the processor and the volatile memory dies. The processor transfers data stored in the volatile memory die to the nonvolatile memory die in response to a backup signal, and transfers the data stored in the nonvolatile memory die to the volatile memory die in response to a recovery signal.
Claims27
A memory system comprising:
- a processor;
- one or more volatile memory dies stacked with the processor;
- and
- one or more nonvolatile memory dies stacked with the processor and the volatile memory dies,
- wherein the processor transfers data stored in the volatile memory die to the nonvolatile memory die in response to a backup signal, and transfers the data stored in the nonvolatile memory die to the volatile memory die in response to a recovery signal.
2 more elements
A memory system comprising:
- a processor configured to communicate with a host;
- a logic die configured to communicate with the processor;
- one or more volatile memory dies stacked with the logic die;
- and
- one or more nonvolatile memory dies stacked with the logic die and the volatile memory dies,
- wherein the logic die transfers data stored in the volatile memory die to the nonvolatile memory die in response to a backup signal, and transfers the data stored in the nonvolatile memory die to the volatile memory die in response to a recovery signal.
3 more elements
A memory system comprising:
- a processor;
- one or more volatile memory dies stacked with a nonvolatile memory die and the processor,
- wherein the processor performs a data transfer operation when a backup signal and/or a recovery signal is generated.
Dependencies are inferred from the claim text.