Integrated and naturalized static wear-leveling for block mapping
AssigneeVirtium Technology, Inc.
InventorsTrevor Chau, Lan Dinh Phan
Life of this patent
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Abstract
An embodiment is a technique to perform static wear leveling in a flash device. A first static block is popped from front of a first-in-first-out (FIFO) static pool when a static wear leveling condition is met. Data are copied from the first static block into an erased block to form a new block. The new block is pushed to end of the FIFO static pool. The static pool is part of a current static set and a next static set. Another embodiment is a technique to maintain a FIFO static pool. All valid data are consolidated when a data collection condition is met. An erased block is selected from a free set. All consolidated data are copied into the erased block to form a new block. The new block is pushed into the FIFO static pool.
Claims12
A method comprising:
- popping a first static block from front of a first-in-first-out (FIFO) static pool when a static wear leveling condition is met;
- copying data from the first static block into an erased block to form a new block;
- and
- pushing the new block to end of the FIFO static pool,
- wherein the static pool is part of a current static set and a next static set.
A method comprising:
- consolidating all valid data when a data collection condition is met;
- selecting an erased block from a free set;
- copying all consolidated data into the erased block to form a new block;
- and
- pushing the new block to a first-in-first-out (FIFO) static pool,
- wherein the static pool is part of a current static set and a next static set.
A circuit comprising:
- a processor;
- a memory coupled to the processor, the memory storing instructions that, when executed, cause the processor to perform operations comprising:
- popping a first static block from front of a first-in-first-out (FIFO) static pool when a static wear leveling condition is met;
- copying data from the first static block into an erased block to form a new block;
- and
- pushing the new block to end of the FIFO static pool,
- wherein the static pool is part of a current static set and a next static set.
A circuit comprising:
- a processor;
- and
- a memory coupled to the processor, the memory storing instructions that, when executed, cause the processor to perform operations comprising:
- consolidating all valid data when a data collection condition is met,
- selecting an erased block from a free set,
- copying all consolidated data into the erased block to form a new block, and
- pushing the new block to a first-in-first-out (FIFO) static pool,
- wherein the static pool is part of a current static set and a next static set.
Dependencies are inferred from the claim text.