Memory devices and their operation having trim registers associated with access operation commands

A method, comprising:

• loading trim settings into a trim register of a memory device associated with a command for an access operation;
• receiving the command for the access operation at the memory device;
• setting trims for the access operation in response to the trim settings of the trim register associated with the command for the access operation;
• performing the access operation using the trims for the access operation;
• loading trim settings into a trim register of the memory device associated with a command for a subsequent access operation while performing the access operation;
• receiving the command for the subsequent access operation at the memory device while performing the access operation;
• setting trims for the subsequent access operation in response to the trim settings of the trim register associated with the command for the subsequent access operation;
• and
• performing the subsequent access operation using the trims for the subsequent access operation.

A method, comprising:

• performing an access operation on a memory device using trims corresponding to trim settings;
• receiving a command to suspend the access operation;
• loading updated trim settings into a particular trim register of the memory device;
• setting updated trims for the access operation in response to the updated trim settings of the particular trim register;
• and
• resuming the access operation using the updated trims.

An apparatus, comprising:

• an array of memory cells;
• a controller;
• and
• a trim register array comprising a plurality of trim registers;
• wherein the controller is configured to load trim settings to a trim register of the trim register array in response to a command received by the memory device;
• wherein the controller is further configured to set trims in response to the trim settings of the trim register in response to receiving an access command associated with the trim settings of the trim register;
• and
• wherein the controller is further configured to perform an access operation on the array of memory cells using the trims in response to receiving the access command.

An apparatus, comprising:

• an external controller;
• a memory in communication with the external controller and storing trim settings corresponding to a plurality of modes of operation;
• and
• a memory device in communication with the external controller, the memory device comprising:
• an array of memory cells;
• an internal controller;
• and
• a trim register array comprising a plurality of trim registers;
• wherein the internal controller is configured to load trim settings to a trim register of the trim register array in response to a command received from the external controller;
• wherein the internal controller is further configured to set trims in response to the trim settings of the trim register in response to receiving an access command associated with the trim settings of the trim register;
• and
• wherein the internal controller is further configured to perform an access operation on the array of memory cells using the trims in response to receiving the access command;
• and
• wherein the external controller is configured, in response to receiving a command from an external device indicative of a desired mode of operation, to select trim settings corresponding to the desired mode of operation, and to transmit the selected trim settings to the memory device.