Directory cache supporting non-atomic input/output operations

A processor comprising:

• at least one core;
• and
• an uncore logic coupled to the at least one core, the uncore logic having a home agent that comprises a directory cache that is a content addressable memory (CAM) structure searchable on full addresses associated with cache lines, wherein the home agent is to generate an entry in the directory cache for a cache line responsive to receiving an ownership request for the cache line from a remote caching agent of an additional processor on behalf of a remote input/output (I/O) device, and wherein the home agent is further to grant ownership of the cache line to the remote caching agent.

A system comprising:

• a first processor having a first uncore logic comprising a caching agent that is to act as a proxy between an input/output (I/O) controller associated with the first processor and a home agent of a second processor, wherein the caching agent is to send an ownership request for a cache line to the home agent responsive to the I/O controller receiving a write request from an I/O device, the ownership request comprising a first indicator that will cause the home agent of the second processor to add a record for the cache line to a directory cache;
• and
• the second processor, coupled to the first processor, having a second uncore logic comprising the home agent and the directory cache, wherein the home agent is to generate an entry in the directory cache for the cache line responsive to receiving the ownership request that includes the first indicator, and wherein the home agent is further to grant ownership of the cache line to the caching agent of the first processor.