Ultrasound imaging with variable line density
AssigneeVolcano Corporation
InventorsJerome Mai, Andrew Hancock
Life of this patent
Estimating the term…
Abstract
The invention generally relates to intravascular ultrasound imaging and to systems and methods to improve line density and image quality. The invention provides an intravascular imaging system that uses a clock device to provide a set of trigger signals for each revolution of the imaging catheter and capture various patterns of scan lines for each set of trigger signals. The system can be operated to capture two scan lines of data for each trigger signal thereby doubling scan line density compared to existing systems. The clock device can be provided by hardware, such as a rotary encoder, that is configured to define a maximum number of trigger signals that the module can provide per rotation of the catheter.
Claims18
A method for intravascular imaging, the method comprising:
- introducing an ultrasonic transducer into a vessel, the transducer being disposed at a distal portion of a catheter;
- using a module operably coupled to a proximal portion of the catheter to provide a plurality of trigger signals;
- and
- triggering a first sequencer operation and a second sequencer operation with each trigger signal.
An intravascular imaging system comprising:
- a catheter with an ultrasonic transducer;
- a control system connected to the catheter;
- a rotary encoder disposed at the control system and operable to produce a plurality of rotary encodes per each 360° rotation of the rotatory encoder;
- and
- a processor in communication with the rotary encoder configured to issue varying patterns of transmit triggers in response to each plurality of rotary encodes.
A system for intravascular imaging, the system comprising:
- an ultrasonic transducer disposed at a distal portion of an intravascular imaging instrument;
- a module operably coupled to a proximal portion of the intravascular imaging instrument, the module operable to provide a plurality of trigger signals;
- and
- a processor operable to trigger a first sequencer operation and a second sequencer operation in response to each trigger signal.
Dependencies are inferred from the claim text.