Gate structure formation processes
AssigneeGlobalfoundries Inc.
InventorsDae-Han CHOI, Wontae HWANG, Puneet KHANNA
Life of this patent
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Abstract
Gate structures and methods of fabricating gate structures of semiconductor devices are provided. One method includes, for instance: providing a sacrificial layer over a substrate; patterning the sacrificial layer to form a gate opening within the sacrificial layer; providing a gate structure within the gate opening in the sacrificial layer; and removing the sacrificial layer, leaving the gate structure over the substrate. In enhanced aspects, the method includes: forming a reverse sidewall-spacer within the gate opening within the sacrificial layer, and after providing the gate structure, recessing the gate structure within the gate opening, and providing a gate cap within the gate recess in the gate structure.
Claims23
A method comprising:
- forming a transistor using a gate-first approach, the forming comprising:
- providing a sacrificial layer over a substrate;
- patterning the sacrificial layer to form a gate opening within the sacrificial layer;
- providing a gate structure within the gate opening in the sacrificial layer, the gate structure comprising one or more refractory material liners and a non-refractory gate fill material;
- removing the sacrificial layer, leaving the gate structure over the substrate;
- and
- after the removing, establishing a source region and a drain region of the transistor, at least in part, within the substrate, the establishing comprising annealing the source region and the drain region, wherein the one or more refractory material liners of the gate structure are selected to inhibit heat damage to the non-refractory gate fill material during the annealing.
A method comprising:
- forming a plurality of transistors using a gate-first approach, the forming comprising:
- providing a sacrificial layer over a substrate;
- patterning the sacrificial layer to form a plurality of gate openings within the sacrificial layer;
- providing a plurality of gate structures within the plurality of gate openings in the sacrificial layer, at least one gate structure of the plurality of gate structures comprising one or more refractory material liners and a non-refractory gate fill material;
- removing the sacrificial layer, leaving the plurality of gate structures over the substrate;
- and
- after the removing, establishing source regions and drain regions within, at least in part, the substrate for the plurality of transistors, the establishing comprising annealing the source regions and the drain regions, wherein the one or more refractory material liners of the at least one gate structure are selected to inhibit heat damage to the non-refractory gate fill material during the annealing.
21-22. (canceled)
Dependencies are inferred from the claim text.