High Voltage Device with Reduced Leakage
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShu-Wei Vanessa Chung, Kuo-Feng Yu
Life of this patent
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Abstract
A semiconductor device is provided which includes a semiconductor substrate, a gate structure formed on the substrate, sidewall spacers formed on each side of the gate structure, a source and a drain formed in the substrate on either side of the gate structure, the source and drain having a first type of conductivity, a lightly doped region formed in the substrate and aligned with a side of the gate structure, the lightly doped region having the first type of conductivity, and a barrier region formed in the substrate and adjacent the drain. The barrier region is formed by doping a dopant of a second type of conductivity different from the first type of conductivity.
Claims20
A method for fabricating a semiconductor device, comprising:
- providing a semiconductor substrate;
- forming a first well in the semiconductor substrate, the first well having a first type of conductivity;
- forming a second well in the semiconductor substrate, the second well having a second type of conductivity different from the first type of conductivity;
- forming a gate structure on the semiconductor substrate, the gate structure having a first portion overlying the first well and a second portion overlying the second well;
- forming a barrier region in the first well, the barrier region being formed by doping a dopant of the second type of conductivity;
- and
- forming a source in the second well and a drain in the first well, the source and drain having the first type of conductivity, the drain being adjacent the barrier region.
A method comprising:
- forming a first well of a first type of conductivity in a substrate;
- forming a second well of a second type of conductivity in the substrate;
- forming a gate structure on the substrate;
- forming a first source/drain feature of the first type of conductivity in the second well;
- forming a lightly doped region of the first type of conductivity in the second well adjacent the gate structure;
- forming a barrier region of the second type of conductivity in the first well;
- and
- forming a second source/drain feature of the first type of conductivity in the first well and adjacent the barrier region.
A method comprising:
- forming a gate structure on a substrate;
- forming a sidewall spacer on the gate structure;
- forming a first lightly doped region of a first type of conductivity in the substrate adjacent the gate structure;
- forming a barrier region of a second type of conductivity in the substrate, wherein the second type of conductivity is different from the first type of conductivity;
- forming a first source/drain feature in the substrate adjacent the first lightly doped region, the first source/drain feature having the first type of conductivity;
- and
- forming a second source/drain feature of the first type of conductivity in the substrate adjacent the barrier region such that the second source/drain feature extends in the substrate to an edge of barrier region.
Dependencies are inferred from the claim text.