Method of forming semiconductor device including silicide layers
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHung-Ming Chen, Chih-Hao Chang, Chih-Hao Yu
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Abstract
A method includes forming a gate structure on a semiconductor material region, wherein the gate structure includes spacer elements abutting a gate electrode layer. The gate electrode layer is etched to provide a recess. A hard mask layer is formed over the gate electrode layer in the recess. Silicide layers are then formed on a source region and a drain region disposed in the semiconductor material region, while the hard mask is disposed over the gate electrode layer. A source contact and a drain contact is then provided, each source and drain contact being conductively coupled to a respective one of the silicide layers.
Claims20
A method comprising:
- forming a gate structure on a semiconductor material region, wherein the gate structure includes spacer elements abutting a gate electrode layer;
- etching the gate electrode layer to provide a recess;
- forming a hard mask layer over the gate electrode layer in the recess;
- forming silicide layers on a source region and a drain region disposed in the semiconductor material region, while the hard mask is disposed over the gate electrode layer;
- and
- forming a source contact and a drain contact, each source and drain contact being conductively coupled to a respective one of the silicide layers.
A method comprising:
- forming a fin structure extending upwardly from a substrate;
- forming a gate structure engaging the fin structure between being disposed between a source region and a drain region, wherein the gate structure includes a gate electrode;
- removing a top portion of the gate electrode to form an opening in the gate structure;
- forming a hard mask layer in the opening;
- forming silicide layers on the respective source and drain regions in the fin structure, while the hard mask layer is in the opening;
- and
- forming source and drain contacts, each source and drain contact being conductively coupled to a respective one of the silicide layers.
A method comprising:
- providing a semiconductor material having spaced source and drain regions therein;
- forming a gate structure interposed between the source and drain regions;
- forming a hard mask layer over the gate structure;
- forming silicide layers on the respective source and drain regions in the semiconductor material;
- removing the hard mask layer to expose the gate structure after forming the silicide layers;
- and
- forming source and drain contacts, each source and drain contact being conductively coupled to a respective one of the silicide layers.
Dependencies are inferred from the claim text.