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US 2014/0177752 A1Published application
Rfi mitigation using burst timing
AssigneeIntel Corporation
InventorsDawson W. Kesling, Maynard C. Falconer
Life of this patent
Estimating the term…
Abstract
In some embodiments, burst timing is provided to reduce RFI in a computing platform.
Claims19
A chip, comprising:
- a circuit to transmit one or more data bursts, the circuit comprising burst timing logic to insert gaps of a determined length between adjacent data bursts to reduce noise at a desired frequency.
An apparatus, comprising
- a computing platform having an I/O interface with a transmitter circuit that includes burst timing logic having burst timing logic to insert gaps between adjacent data bursts from the transmitter to mitigate RFI at a target frequency.
An apparatus, comprising:
- burst timing logic to determine a gap to insert ahead of a present data burst based on spectral radiated energy that would be created from a sum of energy from a preceding data burst and energy from the present data burst.
Dependencies are inferred from the claim text.