All-digital spread spectrum clock generating circuit with emi reduction effect and a method for controlling the same

An all-digital spread spectrum clock generating circuit with EMI reduction effect comprising:

• a spread-spectrum clock controlling unit that receives and generates a delta-sigma modulator control signal according to at least one phase and frequency detecting signal, a reference clock counting signal, and a dividing clock counting signal;
• a phase frequency detecting unit that receives and detects a reference clock signal and a dividing clock signal so as to correspondingly generate said phase and frequency detecting signal;
• a digital controlled oscillator that generates an output clock signal according to said delta-sigma modulator control signal;
• a dividing unit that is coupled to said digital controlled oscillator and receives said output clock signal so as to divide said output clock signal and generate a dividing clock signal;
• and
• a frequency detecting unit that receives said dividing clock signal and said reference clock signal so as to generate a reference clock counting signal and a dividing clock counting signal according to said dividing clock signal and said reference clock signal;
• said spread-spectrum clock controlling unit adjusting a central frequency of said output clock signal according to said reference clock counting signal and said dividing clock counting signal.