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US 2014/0177367 A1Published application
Semiconductor device including plural chips stacked to each other
OwnerJunichi HAYASHIinventor
Life of this patent
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Abstract
A device includes a plurality of Dynamic Random Access Memory (DRAM) chips in a stacked configuration connected by through silicon vias (TSVs), and each of the plurality of DRAM chips being configured to provide a local bank active signal to indicate when any one of a plurality of banks on a respective one of the plurality of DRAM chips is active, and local bank active signals from the plurality of DRAM chips being supplied through TSVs of intervening ones of the plurality of DRAM chips to a lowermost one of the plurality of DRAM chips.
Claims7
A device comprising:
- a plurality of Dynamic Random Access Memory (DRAM) chips in a stacked configuration connected by through silicon vias (TSVs), and
- each of the plurality of DRAM chips being configured to provide a local bank active signal to indicate when any one of a plurality of banks on a respective one of the plurality of DRAM chips is active, and local bank active signals from the plurality of DRAM chips being supplied through TSVs of intervening ones of the plurality of DRAM chips to a lowermost one of the plurality of DRAM chips.
Dependencies are inferred from the claim text.