One-time programmable memory and test method thereof
AssigneeSK hynix Inc.
InventorHyun-Su YOON
Life of this patent
Estimating the term…
Abstract
A one-time programmable memory device may include a normal cell array including a plurality of one-time programmable memory cells, which are programmable and accessible in the normal operation, a test cell array including one-time programmable memory cells, which are programmed at a given pattern in a test operation for determining a failed row and/or a failed column and are not accessible in the normal operation, a row circuit configured to control an operation of a row that is selected by a row address in the normal cell array, and a column circuit configured to access a column that is selected by a column address in the normal cell array.
Claims14
A method for testing a one-time programmable memory with a test row and/or a test column, the method comprising:
- programming one-time programmable memory cells corresponding to all columns of a test row and/or all rows of a test column;
- reading data programmed in the one-time programmable memory cells;
- and
- determining a failed row and/or a failed column using the read data.
A one-time programmable memory device comprising:
- a cell array including a plurality of one-time programmable memory cells arranged in a plurality of normal rows, one or more test rows, a plurality of normal columns, and one or more test columns;
- a row circuit configured to control an operation of a row that is selected by a row address in the cell array;
- and
- a column circuit configured to access a column that is selected by a column address in the cell array,
- wherein, to determine a failed row and a failed column in a test operation, one-time programmable memory cells corresponding to all columns of the test row and all rows of the test column are programmed, and data programmed in one-time programmable memory cells is read.
The one-time programmable memory device of claim wherein the column circuit comprises:
- a column decoder configured to select a column line from a plurality of column lines in response to a column address;
- and
- a sense amplifier configured to supply a low voltage to a column line selected by the column decoder in the program and read operations, and to determine data by confirming that a current flows through the selected column line in the read operation.
A one-time programmable memory device comprising:
- a normal cell array including a plurality of one-time programmable memory cells, which are programmable and accessible in the normal operation;
- a test cell array including one-time programmable memory cells, which are programmed at a given pattern in a test operation for determining a failed row and/or a failed column and are not accessible in the normal operation;
- a row circuit configured to control an operation of a row that is selected by a row address in the normal cell array;
- and
- a column circuit configured to access a column that is selected by a column address in the normal cell array.
Dependencies are inferred from the claim text.