Address counting circuit and semiconductor apparatus using the same
AssigneeSK hynix Inc.
InventorsYoung Suk MOON, Hyung Dong LEE, Yong Kee KWON, Hyung Gyun YANG
Life of this patent
Estimating the term…
Abstract
A semiconductor apparatus includes a first memory die; a second memory die; and a processor configured to provide an external command, an external start address and an external end address which are associated with a read operation, to the first memory die, and provide an external command, an external start address and an external end address, which are associated with a write operation, to the second memory die, in the case where data stored in the first memory die is to be transferred to and stored in the second memory die.
Claims16
A semiconductor apparatus comprising:
- a first memory die;
- a second memory die;
- and
- a processor configured to provide an external command, an external start address and an external end address, which are associated with a read operation, to the first memory die, and provide an external command, an external start address and an external end address, which are associated with a write operation, to the second memory die, in the case where data stored in the first memory die is to be transferred to and stored in the second memory die.
A semiconductor apparatus comprising:
- a command processing unit configured to decode an external command inputted from a processor and generate an internal command;
- an address buffer configured to buffer external address information inputted from the processor and output internal address information;
- an internal address generation block configured to generate internal addresses by performing a counting operation in response to the internal command and the internal address information;
- and
- a data storage unit configured to store data in a region designated by the internal address information or output data from a region designated by the internal address information in response to the internal command.
An address counting circuit comprising:
- a counting control section configured to generate an enable signal, a column start address and a row start address in response to an internal command, internal address information, a first counting signal and a second counting signal;
- a column address counting section configured to generate the first counting signal and a row address increase signal in response to the enable signal and the column start address;
- a row address counting section configured to generate the second counting signal in response to the row start address and the row address increase signal;
- a column address buffer configured to buffer the first counting signal and output a column-side counting address;
- and
- a row address buffer configured to buffer the second counting signal and output a row-side counting address.
Dependencies are inferred from the claim text.