Data write circuit of semiconductor apparatus
AssigneeSK hynix Inc.
InventorJae Il KIM
Life of this patent
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Abstract
A data write circuit of a semiconductor apparatus includes a data path configured to receive a pattern signal and generate a first delayed pattern signal; a data strobe signal path configured to receive the pattern signal and generate a second delayed pattern signal; a data latch block configured to latch the first delayed pattern signal in response to the second delayed pattern signal, and output a resultant signal; and a control block configured to generate the pattern signal, and vary a delay time of the data path according to a result of comparing phases of a latched signal of the data latch block and the pattern signal.
Claims21
A data write circuit of a semiconductor apparatus, comprising:
- a data path;
- a data strobe signal path;
- and
- a control block configured to vary a delay time of the data path according to a phase difference between a signal having passed through the data path and a signal having passed through the data strobe signal path.
A data write circuit of a semiconductor apparatus, is comprising:
- a data path configured to receive a pattern signal and generate a first delayed pattern signal;
- a data strobe signal path configured to receive the pattern signal and generate a second delayed pattern signal;
- a data latch block configured to latch the first delayed pattern signal in response to the second delayed pattern signal, and output a resultant signal;
- and
- a control block configured to generate the pattern signal, and vary a delay time of the data path according to a result of comparing phases of a latched signal of the data latch block and the pattern signal.
Dependencies are inferred from the claim text.