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US 2014/0177355 A1Published application
Nonvolatile memory apparatus
AssigneeSK hynix Inc.
InventorDong Keun KIM
Life of this patent
Estimating the term…
Abstract
A nonvolatile memory apparatus includes a read driver. The read driver unit is configured to apply read current to a memory cell in a normal read operation for outputting data stored in the memory cell, and apply refresh current larger than the read current to the memory cell in a refresh operation.
Claims23
A nonvolatile memory apparatus comprising:
- a read driver unit configured to apply a read current to a memory cell in a normal read operation for outputting a data stored in the memory cell, and apply a refresh current being greater than the read current to the memory cell in a refresh operation.
A nonvolatile memory apparatus comprising:
- a voltage generation unit configured to provide a power supply voltage to a sensing node;
- and
- a read current generation unit electrically coupled with the sensing node, and configured to selectively provide a read current and a refresh current being greater than the read current to a memory cell in response to a read signal and a refresh signal.
A nonvolatile memory apparatus comprising:
- a voltage generation unit configured to provide a power supply voltage to a sensing node;
- a sense amplifier electrically coupled with the sensing node, and configured to sense a sensing voltage and generate a data output signal;
- a data sensing unit configured to generate a set refresh signal in response to the data output signal;
- and
- a read current generation unit configured to selectively provide a read current and a refresh current being greater than the read current to a memory cell in response to a read signal and the set is refresh signal.
2 more elements
A nonvolatile memory apparatus comprising:
- a voltage generation unit configured to provide variable voltages to a sensing node in response to a refresh signal and a read signal;
- and
- a read current generation unit electrically coupled with the sensing node, and configured to provide a read current and a refresh current being greater than the read current to a memory cell in response to the read signal and the refresh signal.
A semiconductor system comprising:
- a semiconductor memory apparatus configured to include a memory cell, to provide a refresh current being greater than a read current and smaller than a current which includes a max value to not change a resistivity of data stored in the memory cell in response to is a refresh signal;
- and
- a memory controller to control operation modes of the semiconductor memory apparatus.
Dependencies are inferred from the claim text.