Nonvolatile memory apparatus
AssigneeSK hynix Inc.
InventorChul Hyun PARK
Life of this patent
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Abstract
A nonvolatile memory apparatus includes a read/write control unit and a voltage generation unit and the memory cell. The read/write control circuit is configured to supply a bias voltage in response to a read control signal, a write control signal and data. The voltage generation unit is configured to compare a level of the bias voltage with a voltage level of a sensing node and drive the sensing node at voltage having a constant level based on a result of the comparison. The memory cell coupled with the sensing node and configured to receive the voltage having the constant level.
Claims19
A nonvolatile memory apparatus, comprising:
- a read/write control unit configured to supply a bias voltage in response to a control signal;
- a voltage generation unit configured to compare a level of the bias voltage with a voltage level of a sensing node and drive the sensing node at voltage having a constant level based on a result of the comparison;
- and
- a memory cell coupled with the sensing node and configured to receive the voltage having the constant level.
A nonvolatile memory apparatus, comprising:
- a sharing driver unit configured to supply a sensing node with voltage having a constant level in response to a read control signal, a write control signal and data;
- a memory cell configured to have a first terminal coupled with the sensing node and receive the voltage having the constant level;
- and
- a current sensing unit coupled with a second terminal of the memory cell and configured to sense an electric current flowing through the memory cell and generate a data output signal based on a result of the sensing.
A nonvolatile memory apparatus, comprising:
- a sharing read/write control unit configured to supply a bias voltage to a plurality of memory blocks in response to a read control signal, a write control signal and data;
- a block switch configured to supply the bias voltage to a memory block, selected from the plurality of memory blocks, in response to a block selection signal;
- a voltage generation unit configured to receive the bias voltage from the block switch, compare a level of the received bias voltage with a voltage level of a sensing node, and drive the sensing node at voltage having a constant level based on a result of the comparison;
- and
- a memory cell coupled with the sensing node and configured to receive the voltage having the constant level.
Dependencies are inferred from the claim text.