Inter-row data transfer in memory devices
AssigneeAdvanced Micro Devices, Inc.
InventorsNiladrish Chatterjee, James O'Connor, Nuwan Jayasena, Gabriel Loh
Life of this patent
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Abstract
A method and apparatus for inter-row data transfer in memory devices is described. Data transfer from one physical location in a memory device to another is achieved without engaging the external input/output pins on the memory device. In an example method, a memory device is responsive to a row transfer (RT) command which includes a source row identifier and a target row identifier. The memory device activates a source row and storing source row data in a row buffer, latches the target row identifier into the memory device, activates a word line of a target row to prepare for a write operation, and stores the source row data from the row buffer into the target row.
Claims22
A method for inter-row data transfer in a memory device, comprising:
- responsive to a row transfer (RT) command including a source row identifier and a target row identifier,
- activating a source row corresponding to the source row identifier and storing source row data in a row buffer;
- latching the target row identifier into the memory device;
- activating a word line of a target row corresponding to the target row identifier to prepare for a write operation;
- and
- storing the source row data from the row buffer into the target row.
A method for inter-row data transfer in a memory device, comprising:
- receiving an activation (ACT) command;
- activating a source row and latching the source row data in a row buffer;
- and
- receiving a precharge to addressed row (PREAR) command which includes a bank identifier and a row address, wherein the source row data from the row buffer is stored in a target row.
A method for inter-row data transfer in a memory device, comprising:
- receiving an activation (ACT) command;
- activating a source row and latching the source row data in a row buffer;
- receiving a latch addressed row (LAR) command which includes a bank identifier and a target row identifier, wherein the row address of a target row is latched to allow a row decoder to address the target row;
- and
- receiving a precharge (PRE) command which writes the source row data in the row buffer to the target row.
A device, comprising:
- a memory device configured to respond to a row transfer (RT) command which includes a source row identifier and a target row identifier and configured to:
- activate a source row corresponding to the source row identifier and storing source row data in a row buffer;
- latch the target row identifier into the memory device;
- activate a word line of a target row corresponding to the target row identifier to prepare for a write operation;
- and
- store the source row data from the row buffer into the target row.
Dependencies are inferred from the claim text.