Back to results
US 2014/0177341 A1Published application
Semiconductor device
AssigneeRenesas Electronics Corporation
InventorTakashi KONO
Life of this patent
Estimating the term…
Abstract
In this flash memory, after first and second nodes are precharged to a power supply voltage, a sense amplifier is activated, and signals appearing at the first and second nodes are held in a register. With output signals of the register, a transistor is rendered conductive, so that a constant current source for offset compensation is connected to the first or second node. Accordingly, the offset voltage of the sense amplifier can be compensated for with a simple configuration.
Claims11
A semiconductor device comprising:
- a precharge circuit precharging first and second nodes to a predetermined voltage;
- a sense amplifier amplifying a voltage between said first and second nodes to output a first or second signal;
- an offset detection circuit activating said sense amplifier after said first and second nodes are precharged to said predetermined voltage by said precharge circuit to detect an offset voltage of said sense amplifier based on an output signal of said sense amplifier, in an offset sense operation;
- and
- an offset compensation circuit changing a voltage of said first or second node precharged by said precharge circuit, based on a detection result of said offset detection circuit, to compensate for the offset voltage of said sense amplifier.
2 more elements
Dependencies are inferred from the claim text.