Non-volatile memory cell

A non-volatile memory cell comprising:

• a coupling device formed in a first conductivity region;
• a first select transistor serially connected to a first floating gate transistor and a second select transistor, wherein the first select transistor, the first floating gate transistor, and the second select transistor are formed in a second conductivity region;
• and
• a second floating gate transistor formed in a third conductivity region, wherein the first conductivity region, the second conductivity region, and the third conductivity region are formed in a fourth conductivity region, and a gate of the first floating gate transistor, a gate of the second floating gate transistor, and an electrode of the coupling device are a single-polycrystalline formed floating gate;
• wherein the first conductivity region, the second conductivity region, and the third conductivity region are wells, and the fourth conductivity region is a deep well;
• wherein the third conductivity region surrounds the first conductivity region and the second conductivity region.