Low power level shifter with output swing control

A level shifter comprising:

• an input signal receiver;
• a gate-controlled transistor coupled to the input signal receiver;
• an output coupled to the gate controlled transistor;
• and
• a half cycle control coupled to the level shifter, wherein the half cycle control is configured to generate a gate voltage to be applied to the gate-controlled transistor for a duration of one half cycle of a predetermined cycle;
• wherein the gate-controlled transistor is configured to receive a predetermined gate voltage when the output voltage exceeds a predetermined value.

A level shifter comprising:

• an NFET driver transistor for receiving an input signal;
• a gate-controlled transistor coupled to the NFET driver transistor;
• a PFET driver transistor coupled to the gate controlled transistor;
• a half cycle control coupled to the level shifter, wherein the half cycle control is configured to generate a gate voltage to be applied to the gate-controlled transistor for a duration of one half cycle of a predetermined cycle;
• and
• an output coupled to the PFET driver transistor;
• wherein the gate-controlled transistor is configured to receive a predetermined gate voltage when the output voltage exceeds a predetermined value.

A level shifter comprising:

• a pair of driver transistors for receiving an input signal and generating an output signal;
• a variable gate control voltage coupled to the level shifter, wherein the variable gate control voltage is configured to generate a variable gate control voltage to be applied to the level shifter;
• and
• a cycle control coupled to the level shifter, wherein the cycle control is configured to generate the gate control voltage for a duration of a predetermined cycle.