Nonvolatile Logic Circuit Architecture & Method of Operation

A reconfigurable processing system situated on a single semiconductor chip, comprising:

• a first memory circuit that includes a first plurality of magnetic field controlled devices of a first type adapted to store program data and operations data;
• a second processing circuit that includes one or more second magnetic field controlled device(s) of a second type adapted to perform a first set of operations during an operational mode in accordance with a first program stored in said first memory circuit;
• wherein all of said first plurality of magnetic field controlled devices and said one or more second magnetic field controlled device(s) are passive devices and consume substantially zero quiescent power in a non-operational mode;
• said second processing circuit and said first memory circuit being adapted such that devices therein only consume power during said operational mode, which operational mode is activated in response to a set of operational pulses received from an external pulse circuit and/or onboard pulses from one or more of said first plurality of magnetic field controlled devices and/or one or more second magnetic field controlled devices;
• further wherein said second processing circuit can be reconfigured dynamically during said operational mode to perform a second set of operations on data for the reconfigurable processing system.