Low voltage bandgap reference circuit

A low voltage bandgap reference circuit having a single stable operating point to provide a reference voltage less than a voltage of a power source, comprising:

• a positive temperature coefficient circuit unit for providing a current having a positive temperature coefficient characteristics, comprising a first differential operational amplifier, a first transistor, a second transistor, a third transistor, a first resistor, a first bipolar transistor and a second bipolar transistor, wherein source terminals of the first, second and third transistors are connected to a power source, gate terminals of the first, second and third transistors are in parallel connected to an output terminal of the first differential operational amplifier, a drain terminal of the first transistor is connected to an emitter terminal of the first bipolar transistor, a drain terminal of the second transistor is connected to one end of the first resistor, the other end of the first resistor is connected to an emitter terminal of the second bipolar transistor, base and collector terminals of the first and second bipolar transistors are grounded, the drain terminal of the first transistor is further connected to an inverting input end of the first differential operational amplifier, and the drain terminal of the second transistor is further connected to a non-inverting input end of the first differential operational amplifier;
• a negative temperature coefficient circuit for providing a current having a negative temperature coefficient characteristics, comprising a second differential operational amplifier, a fourth transistor, a fifth transistor, a sixth transistor, a second resistor and a third bipolar transistor, wherein source terminals of the fourth, fifth and sixth transistors are connected to the power source, gate terminals of the fourth, fifth and sixth transistors are in parallel connected to an output terminal of the second differential operational amplifier, a drain terminal of the fourth transistor is connected to an emitter terminal of the third bipolar transistor, base and collector terminals of the third bipolar transistor are grounded, a drain terminal of the fifth transistor is connected to one end of the second resistor, the other end of the second resistor is grounded, the drain terminal of the fourth transistor is further connected to an inverting input end of the second differential operational amplifier, and the drain terminal of the fifth transistor is further connected to a non-inverting input end of the second differential operational amplifier;
• and
• a load unit, having an end connected to a drain terminal of the third transistor and a drain terminal of the sixth transistor, and another end grounded, wherein the load unit provides the reference voltage across the two ends.