Absorbing excess under-fill flow with a solder trench
AssigneeNVIDIA Corporation
InventorsLeilei ZHANG, Ron Boja, Abraham F. Yee, Zuhair BOKHAREY
Life of this patent
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Abstract
One embodiment sets forth an integrated circuit package that includes a substrate, one or more devices mounted on the substrate, a layer of under-fill configured to secure the one or more devices on the substrate, and a solder trench formed in the substrate, where the aggregate volume of the solder trench is large enough to capture a flow of excess under-fill during fabrication. One advantage of the disclosed integrated circuit package is that the solder trench is used in lieu of solder dam structures, thereby allowing a stencil to be lowered closer to the substrate surface during fabrication, which facilitates depositing solder paste during fabrication.
Claims20
An integrated circuit package, comprising:
- a substrate;
- one or more devices mounted on the substrate;
- one or more electrical connections disposed between the substrate and the one or more devices;
- a layer of under-fill configured to secure the one or more devices on the substrate;
- and
- a solder trench formed in the substrate, wherein the aggregate volume of the solder trench is large enough to capture a flow of excess under-fill during fabrication.
A computing device, comprising:
- an integrated circuit package that includes:
- a substrate;
- one or more devices mounted on the substrate;
- one or more electrical connections disposed between the substrate and the one or more devices;
- a layer of under-fill configured to secure the one or more devices on the substrate;
- and
- a solder trench formed in the substrate, wherein the aggregate volume of the solder trench is large enough to capture a flow of excess under-fill during fabrication.
Dependencies are inferred from the claim text.