Semiconductor integrated circuit and semiconductor system with the same

A semiconductor integrated circuit comprising:

• N (where N is a natural number equal to or greater than 2) semiconductor chips configured to be stacked in three dimensions;
• and
• N groups of through-chip vias, each group of which is configured to go through the N semiconductor chips,
• wherein the N groups of through-chip vias include
• a first group of through-chip vias, each through-chip via of which is coupled to one another between the N semiconductor chips, and
• a second group of through-chip vias, each through-chip via of which is coupled to one another together with the first group of through-chip vias between the N semiconductor chips.

A semiconductor integrated circuit comprising:

• a plurality of semiconductor chips configured to be stacked in three dimensions;
• a first group of through-chip vias configured to go through the plurality of semiconductor chips, respectively, and to provide the plurality of semiconductor chips with a common connection;
• and
• a plurality of groups of through-chip vias, each group of which is configured to go through the plurality of semiconductor chips, respectively, and one through-chip via of each group of which is configured to be coupled to each of a plurality of internal circuits in an one-to-one manner,
• wherein each of the plurality of semiconductor chips includes
• a path selection unit configured to select one of the first group of through-chip vias arranged in the semiconductor chip or a through-chip via of the plurality of groups of through-chip vias arranged in the semiconductor chip in response to a mode switching signal, and
• the internal circuit configured to be selectively coupled to a through-chip via selected by the path selection unit.

A semiconductor system comprising:

• a controller;
• and
• a semiconductor integrated circuit configured to include a plurality of semiconductor chips communicating with the controller through a plurality of pads, at least one of the pads being coupled to the semiconductor chips in common while the rest of the pads are coupled to the semiconductor chips in an one-to-one manner, or all of the pads are coupled to the semiconductor chips in an one-to-one manner,
• wherein the semiconductor integrated circuit transmits and receives the signal to and from the controller via at least one of the pads for a density extension of the semiconductor integrated circuit while the semiconductor integrated circuit transmits and receives the signal to and from the controller via the rest of the pads for a bandwidth extension of the semiconductor integrated circuit, or the semiconductor integrated circuit transmits and receives the signal to and from the controller via all of the pads for the bandwidth extension of the semiconductor integrated circuit.