Method for Welding Gold-Silicon Eutectic Chip, and Transistor

Abstract

Relating to electronic components, the present disclosure provides a method for welding a gold-silicon eutectic chip, and a transistor. The method for welding a gold-silicon eutectic chip includes: electroplating a gold layer with a thickness smaller than or equal to 1 micron on surfaces of a chip carrier; bonding multiple gold protrusions on the gold layer in a welding region; and rubbing a chip in the welding region at a eutectic temperature to form a welding layer. The transistor includes a chip, a chip carrier, and a middle layer connecting the chip and the chip carrier, where the welding middle layer is a welding layer obtained by using the above welding method. The present disclosure reduces an amount of gold in use and lowers a cost of gold-silicon eutectic welding to a relatively large extent, and, accordingly, cuts down the cost of a transistor.

Dependencies are inferred from the claim text.