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US 2014/0175624 A1Published application
Method for manufacturing a chip arrangement, and chip arrangement
AssigneeInfineon Technologies AG
InventorPetteri Palm
Life of this patent
Estimating the term…
Abstract
A method for manufacturing a chip arrangement in accordance with various embodiments may include: placing a chip on a carrier within an opening of a metal structure disposed over the carrier; fixing the chip to the metal structure; removing the carrier to thereby expose at least one contact of the chip; and forming an electrically conductive connection between the at least one contact of the chip and the metal structure.
Claims26
A method for manufacturing a chip arrangement, the method comprising:
- disposing a metal structure over a carrier;
- forming an opening in the metal structure disposed over the carrier;
- placing a chip on the carrier within the opening of the metal structure disposed over the carrier;
- fixing the chip to the metal structure;
- removing the carrier to thereby expose at least one contact of the chip;
- and
- forming an electrically conductive connection between the at least one contact of the chip and the metal structure.
4 more elements
A method for manufacturing a chip arrangement, the method comprising:
- providing a metal structure disposed over a carrier;
- forming at least one first opening in the metal structure to expose a part of the carrier;
- disposing at least one chip within the at least one first opening, wherein an adhesive layer attaches the at least one chip to the part of the carrier that is exposed;
- forming an insulating layer over the at least one chip and the metal structure, wherein the insulating layer fills the at least one first opening;
- forming at least one second opening in at least one of the insulating layer and the adhesive layer to expose at least one of a part of the at least one chip and a part of the metal structure;
- and
- plating an electrically conductive layer over the part of the at least one chip and the part of the metal structure that is exposed.
4 more elements
A chip arrangement, comprising:
- a chip disposed within an opening of a metal structure;
- wherein at least one contact of the chip is electrically connected to the metal structure, and wherein a surface of the chip is at least substantially flush with a surface of the metal structure.
A method for manufacturing a chip arrangement, the method comprising:
- placing a chip on a carrier within an opening of the a metal structure disposed over the carrier;
- fixing the chip to the metal structure;
- removing the carrier to thereby expose at least one contact of the chip;
- and
- forming an electrically conductive connection between the at least one contact of the chip and the metal structure;
- wherein forming the electrically conductive connection between the at least one contact of the chip and the metal structure comprises:
- forming a plating mask over at least a part of the chip and over a first part of a surface of the metal structure, wherein the at least one contact of the chip and a second part of the surface of the metal structure are free from the plating mask;
- and
- plating an electrically conductive layer over the at least one contact of the chip and the second part of the surface of the metal structure using the plating mask as a mask, and
- patterning the electrically conductive layer.
7 more elements
A method for manufacturing a chip arrangement, the method comprising:
- placing a chip on a carrier within an opening of the a metal structure disposed over the carrier;
- fixing the chip to the metal structure;
- removing the carrier to thereby expose at least one contact of the chip;
- and
- forming an electrically conductive connection between the at least one contact of the chip and the metal structure;
- wherein fixing the chip to the metal structure comprises:
- placing an insulating layer between a conductive layer and the chip and the metal structure disposed over the carrier;
- and
- applying heat and pressure to fuse the conductive layer, the insulating layer and the chip and the metal structure disposed over the carrier.
6 more elements
A method for manufacturing a chip arrangement, the method comprising:
- placing a chip on a carrier within an opening of the a metal structure disposed over the carrier;
- fixing the chip to the metal structure;
- removing the carrier to thereby expose at least one contact of the chip;
- and
- forming an electrically conductive connection between the at least one contact of the chip and the metal structure;
- wherein removing the carrier to thereby expose at least one contact of the chip comprises:
- removing the carrier from the chip and the metal structure;
- and
- forming at least one second opening to expose the at least one contact of the chip.
6 more elements
Dependencies are inferred from the claim text.