Semiconductor chip and semiconductor apparatus with embedded capacitor

A semiconductor apparatus comprising:

• a semiconductor chip comprising:
• a semiconductor substrate having a first surface and a second surface and comprising a plurality of semiconductor devices;
• an internal wiring layer comprising multi-layered internal wiring lines formed over the first surface and are electrically connected to the plurality of semiconductor devices, wherein an uppermost internal wiring line among the internal wiring lines is formed with a power supply pad and a ground pad;
• a dielectric layer formed over the uppermost internal wiring line while exposing the power supply pad and the ground pad;
• an external connection reinforcing line formed over the power supply pad or the ground pad which is exposed, and extending onto the dielectric layer;
• and
• an embedded capacitor comprising the external connection reinforcing line, the dielectric layer, and a portion of the uppermost internal wiring line which correspond to the external connection reinforcing line;
• and
• external connection terminals electrically connected to the power supply pad and the ground pad respectively.

An embedded capacitor formed in a semiconductor chip, comprising:

• a first electrode comprising a portion of an uppermost internal wiring line which is an uppermost layer of an internal wiring layer formed over a first surface of a semiconductor substrate and including multi-layered internal wiring lines electrically connected to a plurality of semiconductor devices, wherein the first electrode is electrically connected to a power supply pad or a ground pad;
• a dielectric area corresponding to the first electrode in a dielectric layer which is formed over the uppermost internal wiring line while exposing the power supply pad and the ground pad;
• and
• a second electrode formed over the power supply pad or the ground pad which is exposed and is not connected to the first electrode so as to extend onto the dielectric area.