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US 2014/0175599 A1Published application
Integrated circuit package with printed circuit layer
AssigneeTexas Instruments Incorporated
InventorsMatthew David Romig, Lance Cole Wright, Leslie Edward Stark, Frank Stepniak, Sreenivasan K. Koduri
Life of this patent
Estimating the term…
Abstract
An integrated circuit (IC) package including an IC die and a conductive ink printed circuit layer electrically connected to the IC die.
Claims20
An integrated circuit (IC) package comprising:
- an IC die;
- a signal routing layer comprising:
- an etched metal signal routing layer;
- and
- a plated metal signal routing layer;
- a conductive ink printed passive circuit layer electrically positioned between and connected to said IC die and said signal routing layer.
3 more elements
(canceled)
An integrated circuit (IC) package comprising:
- an IC die;
- a signal routing layer comprising:
- an etched metal signal routing layer;
- and
- a plated metal signal routing layer;
- a substrate positioned between said signal routing layer and said conductive ink printed circuit layer;
- a conductive ink printed passive circuit layer printed on a bottom surface of said substrate:
- a ball grid array, having a plurality of balls, positioned below said substrate and electrically attached to said signal routing layer through a plurality of vias extending through a plurality of via holes in said substrate and wherein said conductive ink printed circuit layer is electrically connected to said signal routing layer through at least one of said via holes.
5 more elements
A method of making an integrated circuit (“IC”) package comprising:
- ink jet printing a circuit onto a nonconductive layer of the IC package using conductive ink, the ink jet printed circuit having at least one passive element;
- electrically connecting an IC die to a routing circuit:
- and
- electrically connecting the ink jet printed circuit to the routing circuit.
1 more element
(canceled)
(canceled)
(canceled)
An integrated circuit (“IC”) package comprising:
- an IC die having an upper surface with a plurality of contact pads thereon and a bottom surface;
- a patterned metal signal routing layer positioned below said bottom surface of said die and having a top surface and a bottom surface, said top surface of said signal routing layer being wire bond attached to at least one of said contact pads on said die ;
- a polyimide tape substrate positioned below said IC die and said signal routing layer and having a top surface and a bottom surface and having a plurality of vias extending between said top and bottom surfaces thereof;
- at least one solder resist layer provided on one of said polyimide tape substrate and said signal routing layer;
- a conductive ink printed passive circuit layer printed on one of said polyimide tape substrate and said solder resist layer and electrically connected to said signal routing layer;
- an encapsulation layer encapsulating said IC die, said etched metal signal routing layer, said conductive ink printed layer and at least a portion of said polyimide tape substrate;
- and
- a ball grid array positioned below said polyimide tape substrate and electrically attached to said etched metal signal routing layer through said vias.
5 more elements
Dependencies are inferred from the claim text.