Back to results
US 2014/0175597 A1Published application
Trench with reduced silicon loss
AssigneeTexas Instruments Incorporated
InventorManoj Mehrotra
Life of this patent
Estimating the term…
Abstract
An isolation trench in a substrate of a semiconductor device includes a first shallow portion, a transition region, and a second deeper portion. The isolation trench contains a dielectric filler. The isolation trench is formed by first forming a first shallow portion of the isolation trench, forming polysilicon sidewalls on the first shallow portion, and then etching the second deeper portion.
Claims8
A semiconductor device, comprising:
- a substrate;
- an isolation trench in said substrate having a shallower portion and a deeper portion and a transition region between said deeper portion and said shallower portion, wherein a first slope of a first sidewall of said transition region sidewall is less vertical than a second slope of a second sidewall of said shallower portion and is less vertical than a third slope of a third sidewall of said deeper portion and said second slope is less vertical than said third slope, said isolation trench containing a dielectric fill material.
A semiconductor device, comprising:
- a substrate;
- an isolation trench in said substrate having a shallower portion and a deeper portion and a transition region between said deeper portion and said shallower portion, wherein a first slope of a first sidewall of said shallower portion and is less vertical than a second slope of a second sidewall of said deeper portion, said isolation trench containing a dielectric fill material.
Dependencies are inferred from the claim text.