Semiconductor device having a high-k gate dielectric layer
AssigneeSamsung Electronics Co., Ltd.
InventorsWeonHong KIM, Dae-Kwon JOO, Hajin LIM, Jinho DO, Kyungil HONG, Moonkyun SONG
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Abstract
A method of fabricating a semiconductor device includes forming a lower interfacial layer on a semiconductor layer, the lower interfacial layer being a nitride layer, forming an intermediate interfacial layer on the lower interfacial layer, the intermediate interfacial layer being an oxide layer, and forming a high-k dielectric layer on the intermediate interfacial layer. The high-k dielectric layer has a dielectric constant that is higher than dielectric constants of the lower interfacial layer and the intermediate interfacial layer.
Claims8
1-8. (canceled)
A semiconductor device comprising:
- an interfacial layer pattern on a predetermined region of a semiconductor layer;
- a high-k dielectric layer pattern on the interfacial layer pattern;
- and
- a gate electrode on the high-k dielectric layer pattern, wherein:
- the interfacial layer pattern includes a nitride layer pattern contacting the semiconductor layer and an oxide layer pattern on the nitride layer pattern, and
- the high-k dielectric layer pattern has a dielectric constant that is higher than dielectric constants of the nitride layer pattern and the oxide layer pattern.
-20. (canceled)
Dependencies are inferred from the claim text.