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US 2014/0175562 A1Published application
Spacer divot sealing method and semiconductor device incorporating same
AssigneeGlobalfoundries Inc.
InventorsHaiting Wang, Huang Liu, Yong Meng Lee, Songkram Srivathanakul
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Abstract
A semiconductor structure in fabrication includes a NFET and a PFET. Spacers adjacent gate structures of the NFET and PFET have undesired divots that can lead to substrate damage from chemicals used in a subsequent etch. The fabrication also leaves hard masks over the gate structures with non-uniform height. The divots are filled with material resistant to the chemicals used in the etch. Excess filler is removed, and uniform height is restored. Further fabrication may then proceed.
Claims9
A method, comprising:
- providing a semiconductor structure in fabrication having undesired divots in at least some spacers adjacent transistor gate structures;
- and
- filling the divots with a filler material prior to subsequent fabrication that may cause substrate damage due to the undesired spacer divots;
- wherein the filler material is chosen based on the subsequent fabrication.
1 more element
A semiconductor structure, comprising:
- a plurality of transistors having a plurality of gate structures;
- and
- a plurality of spacers adjacent the plurality of gate structures;
- wherein the plurality of spacers comprise at least some spacers having a filler material filling a plurality of divots in the at least some spacers, and wherein the filler material is resistant to one or more materials used in a subsequent fabrication process.
1 more element
Dependencies are inferred from the claim text.