Non-volatile memory structure and manufacturing method thereof

A method for manufacturing a non-volatile memory structure, comprising:

• providing a substrate having a gate structure formed thereon, the gate structure comprising a conductive layer and a dielectric layer;
• performing a first oxidation process to form a first silicon oxide (SiO) layer at least covering a bottom corner of the conductive layer;
• performing a first etching process to remove the first SiO layer and a portion of the dielectric layer to form a cavity under the conductive layer;
• performing a second oxidation process to form a second SiO layer covering sidewalls of the cavity and a third SiO layer covering a surface of the substrate;
• forming a first silicon nitride (SiN) layer on the substrate, the first SiN layer filling in the cavity and covering the gate structure;
• and
• removing a portion of the first SiN layer to form a SiN structure comprising a foot portion filling in the cavity and an erection portion upwardly extended from the foot portion, and the erection portion covering sidewalls of the gate structure.