Sic epitaxial wafer and method for manufacturing same
AssigneeShowa Denko K.K.
InventorsKenji Momose, Michiya Odawara, Daisuke Muto, Yoshiaki Kageshima
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AssigneeShowa Denko K.K.
InventorsKenji Momose, Michiya Odawara, Daisuke Muto, Yoshiaki Kageshima
Estimating the term…
Provided are a SiC epitaxial wafer in which the surface density of stacking faults is reduced, and a manufacturing method thereof. The method for manufacturing such a SiC epitaxial wafer comprises a step of determining a ratio of basal plane dislocations (BPD), which causes stacking faults in a SiC epitaxial film of a prescribed thickness which is formed on a SiC single crystal substrate having an off angle, to basal plane dislocations which are present on a growth surface of the SiC single crystal substrate, a step of determining an upper limit of surface density of basal plane dislocations on the growth surface of a SiC single crystal substrate used based on the above ratio, and a step of preparing a SiC single crystal substrate which has surface density equal to or less than the above upper limit, and forming a SiC epitaxial film on the SiC single crystal substrate under the same conditions as the growth conditions of the epitaxial film used in the step of determining the ratio.
A method of manufacturing a SiC epitaxial wafer wherein a SiC epitaxial layer is provided on a SiC single crystal substrate having an off angle, comprising:
A method of manufacturing a SiC epitaxial wafer provided with a SiC epitaxial layer on a SiC single crystal substrate having an off angle, comprising:
A SiC epitaxial wafer provided with a SiC epitaxial layer on a SiC single crystal substrate having an off angle, wherein the surface density of stacking faults caused by BPD of the SiC single crystal substrate is 0.1 stacking faults/cm2 or less in the SiC epitaxial film.
Dependencies are inferred from the claim text.