Thin film transistor array panel and method of manufacturing the same
AssigneeSamsung Display Co., Ltd.
InventorsShin Il CHOI, Sang Gab KIM, Hyang-Shik KONG, Su Bin BAE, Yu-Gwang JEONG
Life of this patent
Estimating the term…
Abstract
A thin film transistor array panel includes: a substrate, a gate line positioned on the substrate and including a gate electrode, a semiconductor layer positioned on the substrate and including an oxide semiconductor, a data wire layer positioned on the substrate and including a data line crossing the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode, and a capping layer covering the data wire layer, in which an end of the capping layer is inwardly recessed as compared to an end of the data wire layer.
Claims20
A thin film transistor array panel comprising:
- a substrate;
- a gate line positioned on the substrate and including a gate electrode;
- a semiconductor layer positioned on the substrate and including an oxide semiconductor;
- a data wire layer positioned on the substrate and including a data line crossing the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode;
- and
- a capping layer covering the data wire layer,
- wherein an end of the capping layer is inwardly recessed as compared to an end of the data wire layer.
A method of manufacturing a thin film transistor array panel, comprising:
- forming a gate line including a gate electrode on a substrate;
- forming a gate insulating layer covering the gate line;
- forming a semiconductor material layer on the substrate;
- forming a data wire material layer on the semiconductor material layer;
- forming a capping material layer on the data wire material layer;
- forming a first photosensitive film pattern on the capping layer, the first photosensitive film pattern having a first region and a second region having a thickness that is larger than the thickness of the first region;
- etching the capping material layer, the data wire material layer, and the semiconductor material layer by using the first photosensitive film pattern as a first mask;
- performing etchback of the first photosensitive film pattern to form a second photosensitive film pattern;
- etching the capping material layer and the data wire material layer by using the second photosensitive film pattern as a second mask to form a capping layer and a data wire layer;
- ashing the second photosensitive film pattern to form a third photosensitive film pattern;
- and
- etching the capping layer by using the third photosensitive film pattern as a third mask,
- wherein in the etching of the capping material layer and the data wire material layer by using the second photosensitive film pattern as the second mask, an end of the capping layer includes a projection outwardly protruding from an end of the data wire layer.
Dependencies are inferred from the claim text.