Resistance variable memory structure and method of forming the same

A semiconductor structure, comprising:

• an access transistor comprising a source region and a drain region on opposite sides of a gate electrode;
• at least three metallization layer over the access transistor;
• and
• a resistance variable memory structure over the at least three metallization layer, the resistance variable memory structure comprising:
• a first electrode disposed over the at least three metallization layer, wherein the first electrode is electrically connected to the drain region of the access transistor and has a sidewall surface;
• a resistance variable layer having a vertical portion and a horizontal portion, wherein the vertical portion is a closed loop and surrounds the sidewall surface of the first electrode and the horizontal portion extends from the vertical portion away from the first electrode;
• and
• a second electrode disposed over the resistance variable layer and surrounding the vertical portion of the resistance variable layer.

A semiconductor structure, comprising:

• a substrate;
• a first resistance variable memory structure adjacent to a second resistance variable memory structure disposed over the substrate, each of the first and the second resistance variable memory structure comprising:
• a first electrode disposed over the substrate and having a sidewall surface;
• a resistance variable layer having a first portion which is a closed loop and surrounds the sidewall surface of the first electrode and a second portion which extends from the first portion away from the first electrode;
• and
• a second electrode disposed over the resistance variable layer;
• and
• a conductive plug contacting both second electrodes of the first and second resistance variable memory structures.