# US 2014/0157039 A1 · Using data watchpoints to detect unitialized memory reads

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- Number: US 2014/0157039 A1
- Document ID: US20140157039A1
- Status: Published application
- Kind: A1
- Application number: 13/693,484
- Filed: 2012-12-04
- Published: 2014-06-05
- Earliest claimed: 2012-12-04
- Assignees: Texas Instruments Incorporated
- Applicants: Texas Instruments Incorporated
- Inventors: Jason L. Peck
- Web page: https://patentgrep.com/patent/US20140157039A1

## CPC

- G06F 11/07: Responding to the occurrence of a fault, e.g. fault tolerance
- G06F 11/073: {in a memory management context, e.g. virtual memory or cache management (memory management G06F12/00; testing of static memory units G11C29/00)}
- G06F 11/0751: {Error or fault detection not based on redundancy (power supply failures G06F1/30; network fault management H04L41/06)}
- G06F 11/366: {using diagnostics (G06F11/0703 takes precedence)}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A method of detecting uninitialized memory reads is shown where either all or a subset of a random access memory system is initialized to a know value. One or more watch points are implemented where after a memory read is detected the value read is compared to the value written during initialization. If the values match debug information is captured and appropriate corrective action is taken.

## Claims

### Claim 1

A method of detecting CPU memory read requests from an uninitialized location in a random access memory system comprising the steps of:
writing a predetermined data value into each memory location of the random access memory system under test;
detecting each data read request operation from the random access memory system;
comparing the data read during the memory read operation to the predetermined data value previously written into all locations of the random access memory system under test;
capturing debug information if the data read during the read operation matches the predetermined data value previously written into all locations of the random access memory system under test;
taking corrective action if the data read during the read operation matches the predetermined data value previously written into all locations of the random access memory system under test.

### Claim 2 (depends on 1)

The method of claim 1 wherein:
the predetermined data value is written into only a subset of the random access memory system under test.

### Claim 3 (depends on 1)

The method of claim 1 wherein:
one or more CPUs are halted as part of the corrective action.

### Claim 4 (depends on 1)

The method of claim 1 wherein:
an interrupt is generated as part of the corrective action.

### Claim 5 (depends on 1)

The method of claim 1 wherein:
a trace message is generated as part of the corrective action.

### Claim 6 (depends on 1)

The method of claim 1 wherein:
the debug information captured includes the read address, the ID of the initiator, and a timestamp.

### Claim 7 (depends on 1)

The method of claim 1 wherein:
the debug information captured includes the program counter and the relevant task ID.

### Claim 8 (depends on 1)

The method of claim 1, further comprising the steps of:
writing the predetermined data value into each location of the random access memory under test that is freed during program execution.