# US 2014/0157000 A1 · Secure delivery of processing code

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- Number: US 2014/0157000 A1
- Document ID: US20140157000A1
- Status: Published application
- Kind: A1
- Application number: 13/730,766
- Filed: 2012-12-28
- Published: 2014-06-05
- Earliest claimed: 2012-11-30
- Assignees: Broadcom Corporation
- Applicants: Broadcom Corporation
- Inventors: Mark Buer; Jacob Mendel
- Web page: https://patentgrep.com/patent/US20140157000A1

## CPC

- G06F 21/76: in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]
- G06F 12/1408: {by using cryptography (for digital transmission H04L9/00)}
- G06F 21/57: Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
- G06F 21/572: {Secure firmware programming, e.g. of basic input output system [BIOS]}
- G06F 21/606: {by securing the transmission between two devices or processes}
- G06F 21/64: Protecting data integrity, e.g. using checksums, certificates or signatures
- G06F 2221/2107: File encryption
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

An apparatus may comprise a secure portion of a chip and an external memory device. The secure portion of the chip may be configured to receive an encryption key, and the memory device may be configured to receive an encrypted processing code. The secure portion of the chip may be configured to verify the encrypted processing code by decrypting the encrypted processing code using the encryption key. A non-secure portion of the chip may be configured to write the encrypted processing code on the memory device while the memory device is coupled to the chip. The encryption key may be associated with an identifier of the chip.

## Claims

### Claim 1

An apparatus, comprising:
a secure portion of a chip; and
an external memory device,
wherein the secure portion of the chip is configured to receive an encryption key,
wherein the memory device is configured to receive an encrypted processing code, and
wherein the secure portion of the chip is configured to verify the encrypted processing code by decrypting the encrypted processing code using the encryption key.

### Claim 2 (depends on 1)

The apparatus of claim 1, further comprising:
a non-secure portion of the chip configured to write the encrypted processing code on the memory device while the memory device is coupled to the chip.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein the encryption key is associated with an identifier of the chip.

### Claim 4 (depends on 3)

The apparatus of claim 3, wherein the identifier is associated with a serial number of the chip.

### Claim 5 (depends on 3)

The apparatus of claim 3, wherein the identifier is associated with a group of serial numbers of chips.

### Claim 6 (depends on 1)

The apparatus of claim 1, wherein the secure portion of the chip is further configured to re-encrypt the processing code for storage on the memory device.

### Claim 7 (depends on 6)

The apparatus of claim 6, wherein the secure portion of the chip is configured to re-encrypt using a second encryption key, the second encryption key being generated by the secure portion.

### Claim 8 (depends on 1)

The apparatus of claim 1, wherein the memory device is a flash memory.

### Claim 9

A method, comprising:
encrypting processing code using an encryption key;
delivering the encryption key to a secure portion of a chip;
delivering the encrypted processing code for storage to a memory device, the memory device being external to the chip; and
causing verification of the encrypted processing code by the secure portion of the chip.

### Claim 10 (depends on 9)

The method of claim 9, wherein delivering the encrypted processing code for storage to the memory device comprises writing the encrypted processing code on the memory device while the memory device is coupled to the chip.

### Claim 11 (depends on 9)

The method of claim 9, further comprising:
coupling the memory device to the chip after delivering the encrypted processing code for storage to the memory device.

### Claim 12 (depends on 9)

The method of claim 9, wherein the encryption key is associated with an identifier of the chip.

### Claim 13 (depends on 12)

The method of claim 12, wherein the identifier is associated with a serial number of the chip.

### Claim 14 (depends on 12)

The method of claim 12, wherein the identifier is associated with a group of serial numbers of chips.

### Claim 15 (depends on 9)

The method of claim 9, further comprising:
re-encrypting the processing code by the secure portion for storage on the memory device.

### Claim 16 (depends on 15)

The method of claim 15, wherein the secure portion of the chip re-encrypts the processing code using a second encryption key, the second encryption key being generated by the secure portion.

### Claim 17 (depends on 9)

The method of claim 9, wherein the memory device is a flash memory.

### Claim 18

A computer program product, embodied on a non-transitory computer-readable medium, comprising:
computer code for receiving encrypted processing code from an external memory device by a secure portion of a chip;
computer code for receiving an encryption key from a secure zone by the secure portion of the chip;
computer code for decrypting the encrypted processing code for verification of the encrypted processing code by the secure portion of the chip; and
computer code for re-encrypting the processing code for storage on the external memory device.

### Claim 19 (depends on 18)

The computer program product of claim 18, wherein the encryption key is associated with an identifier of the chip.

### Claim 20 (depends on 19)

The computer program product of claim 19, wherein the identifier is associated with a serial number of the chip.